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ST72325AR7-Auto Datasheet(PDF) 186 Page - STMicroelectronics |
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ST72325AR7-Auto Datasheet(HTML) 186 Page - STMicroelectronics |
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186 / 243 page ![]() Obsolete Product(s) - Obsolete Product(s) Instruction set ST72325xxx-Auto 186/243 Doc ID 13770 Rev 3 18.2.1 Using a prebyte The instructions are described with one to four opcodes. In order to extend the number of available opcodes for an 8-bit CPU (256 opcodes), three different prebyte opcodes are defined. These prebytes modify the meaning of the instruction they precede. The whole instruction becomes: PC - 2 End of previous instruction PC - 1 Prebyte PC Opcode PC + 1 Additional word (0 to 2) according to the number of bytes required to compute the effective address These prebytes enable instruction in Y as well as indirect addressing modes to be implemented. They precede the opcode of the instruction in X or the instruction using direct addressing mode. The prebytes are: PDY 90 Replace an X based instruction using immediate, direct, indexed, or inherent addressing mode by a Y one. PIX 92 Replace an instruction using direct, direct bit, or direct relative addressing mode to an instruction using the corresponding indirect addressing mode. It also changes an instruction using X indexed addressing mode to an instruction using indirect X indexed addressing mode. PIY 91 Replace an instruction using X indirect indexed addressing mode by a Y one. Logical operations AND OR XOR CPL NEG Bit Operation BSET BRES Conditional Bit Test and Branch BTJT BTJF Arithmetic operations ADC ADD SUB SBC MUL Shift and Rotates SLL SRL SRA RLC RRC SWAP SLA Unconditional Jump or Call JRA JRT JRF JP CALL CALLR NOP RET Conditional Branch JRxx Interruption management TRAP WFI HALT IRET Condition Code Flag modification SIM RIM SCF RCF Table 103. Instruction groups (continued) Group Instructions |
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