ST72361AR4-Auto datasheet(109/279 Pages) STMICROELECTRONICS

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ST72361xx-Auto

16-bit timer

Doc ID 12468 Rev 3

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These registers are readable and writable and are not affected by the timer hardware. A

reset event changes the OCiR value to 8000h.

Timing resolution is one count of the free running counter: (fCPU/CC[1:0]).

12.3.6

Procedure

To use the output compare function, select the following in the CR2 register:

●

Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output

compare i signal.

●

Select the timer clock (CC[1:0]) (see Table 50).

And select the following in the CR1 register:

●

Select the OLVLi bit to applied to the OCMPi pins after the match occurs.

●

Set the OCIE bit to generate an interrupt if it is needed.

When a match is found between OCRi register and CR register:

●

OCFi bit is set.

●

The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).

●

A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit is

cleared in the CC register (CC).

The OCiR register value required for a specific timing application can be calculated using

the following formula:

Where:

t = Output compare period (in seconds)

fCPU = CPU clock frequency (in hertz)

PRESC= Timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits, see Table 50)

If the timer clock is an external clock, the formula is:

Where:

t = output compare period (in seconds)

fEXT = external timer clock frequency (in hertz)

Clearing the output compare interrupt request (that is, clearing the OCFi bit) is done by:

●

Reading the SR register while the OCFi bit is set.

●

An access (read or write) to the OCiLR register.

 OCiR = t * fCPU

PRESC

 OCiR = t

* fEXT

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