ST72561AR7-Auto datasheet(230/324 Pages) STMICROELECTRONICS

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beCAN controller (beCAN)

ST72561-Auto

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Doc ID 12370 Rev 8

If ABOM is set, the beCAN will start the recovering sequence automatically after it has

entered bus-off state.

If ABOM is cleared, the software must initiate the recovering sequence by requesting

beCAN to enter initialization mode. Then beCAN starts monitoring the recovery sequence

when the beCAN is requested to leave the initialization mode.

Note:

In initialization mode, beCAN does not monitor the CANRX signal, therefore it cannot

complete the recovery sequence. To recover, beCAN must be in normal mode.

17.4.6

Bit timing

The bit timing logic monitors the serial bus-line and performs sampling and adjustment of

the sample point by synchronizing on the start-bit edge and resynchronizing on the following

edges.

Its operation may be explained simply by splitting nominal bit time into three segments as

follows:

●

Synchronization segment (SYNC_SEG):

a bit change is expected to occur within this time segment. It has a fixed length of one

time quantum (1 x tCAN).

●

Bit segment 1 (BS1):

defines the location of the sample point. It includes the PROP_SEG and

PHASE_SEG1 of the CAN standard. Its duration is programmable between 1 and 16

time quanta but may be automatically lengthened to compensate for positive phase

drifts due to differences in the frequency of the various nodes of the network.

●

Bit segment 2 (BS2):

defines the location of the transmit point. It represents the PHASE_SEG2 of the CAN

standard. Its duration is programmable between 1 and 8 time quanta but may also be

automatically shortened to compensate for negative phase drifts.

●

Resynchronization Jump Width (RJW):

defines an upper bound to the amount of lengthening or shortening of the bit segments.

It is programmable between 1 and 4 time quanta.

To guarantee the correct behavior of the CAN controller, SYNC_SEG + BS1 + BS2 must be

greater than or equal to 5 time quanta.

For a detailed description of the CAN resynchronization mechanism and other bit timing

configuration constraints, please refer to the Bosch CAN standard 2.0.

As a safeguard against programming errors, the configuration of the Bit Timing Registers

CBTR1 and CBTR0 is only possible while the device is in Initialization mode.

Figure 105. Bit timing

SYNC_SEG

BIT SEGMENT 1 (BS1)

BIT SEGMENT 2 (BS2)

NOMINAL BIT TIME

1 x tCAN

tBS1

tBS2

SAMPLE POINT

TRANSMIT POINT

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