S3A3 datasheet(6/139 Pages) RENESAS

6 / 139 page

R01DS0307EU0100 Rev.1.00

Page 6 of 139

Mar 7, 2017

S3A3

1. Overview

Table 1.3

System (1 of 2)

Feature

Functional description

Operating modes

Two operating modes:

 Single-chip mode

 SCI/USB boot mode.

See section 3, Operating Modes in User's Manual.

Resets

14 types of resets:

 RES pin reset

 Power-on reset

 VBATT-selected voltage power-on reset

 Independent watchdog timer reset

 Watchdog timer reset

 Voltage monitor 0 reset

 Voltage monitor 1 reset

 Voltage monitor 2 reset

 SRAM parity error reset

 SRAM ECC error reset

 Bus master MPU error reset

 Bus slave MPU error reset

 Stack pointer error reset

 Software reset.

See section 6, Resets in User's Manual.

Low Voltage Detection (LVD)

The Low Voltage Detection (LVD) monitors the voltage level input to the VCC pin, and the

detection level can be selected using a software program. See section 8, Low Voltage

Detection (LVD) in User's Manual.

Clocks

 Main clock oscillator (MOSC)

 Sub-clock oscillator (SOSC)

 High-speed on-chip oscillator (HOCO)

 Middle-speed on-chip oscillator (MOCO)

 Low-speed on-chip oscillator (LOCO)

 PLL frequency synthesizer

 Independent watchdog timer on-chip oscillator

 Clock out support.

See section 9, Clock Generation Circuit in User's Manual.

Clock Frequency Accuracy

Measurement Circuit (CAC)

The Clock Frequency Accuracy Measurement Circuit (CAC) checks the system clock

frequency with a reference clock signal by counting the number of pulses of the system clock

to be measured. The reference clock can be provided externally through a CACREF pin or

internally from various on-chip oscillators.

Event signals can be generated when the clock does not match or measurement ends.

This feature is particularly useful in implementing a fail-safe mechanism for home and

industrial automation applications.

See section 10, Clock Frequency Accuracy Measurement Circuit (CAC) in User's Manual.

Interrupt Controller Unit (ICU)

The Interrupt Controller Unit (ICU) controls which event signals are linked to the NVIC/DTC

module and DMAC module. The ICU also controls NMI interrupts. See section 14, Interrupt

Controller Unit (ICU) in User's Manual.

Key Interrupt Function (KINT)

A key interrupt can be generated by setting the Key Return Mode register (KRM) and inputting

a rising or falling edge to the key interrupt input pins. See section 21, Key Interrupt Function

(KINT) in User's Manual.

Low power modes

Power consumption can be reduced in multiple ways, including setting clock dividers,

controlling EBCLK output, stopping modules, selecting power control mode in normal

operation, and transitioning to low power modes. See section 11, Low Power Modes in User's

Manual.

Battery backup function

A battery backup function is provided for partial powering by a battery. The battery powered

area includes RTC, SOSC, LOCO, Wakeup control, Backup memory, VBATT_R low voltage

detection, and switch between VCC and VBATT.

During normal operation, the battery powered area is powered by the main power supply,

which is the VCC pin. When a VCC voltage fall is detected, the power source is switched to the

dedicated battery backup power pin, the VBATT pin.

When the voltage rises again, the power source is switched from the VBATT pin to the VCC

pin. See section 12, Battery Backup Function in User's Manual.

The register write protection function protects important registers from being overwritten due to

software errors. See section 13, Register Write Protection in User's Manual.

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