S3A3 datasheet(80/139 Pages) RENESAS

80 / 139 page

R01DS0307EU0100 Rev.1.00

Page 80 of 139

Mar 7, 2017

S3A3

2. Electrical Characteristics

Figure 2.55

SCI simple SPI mode clock timing

Figure 2.56

SCI simple SPI mode timing (master, CKPH = 1)

Simple

SPI

Slave access time

tSA

10 (PCLKA >

32 MHz),

6 (PCLKA ≤

32 MHz)

tPcyc

Figure 2.58 and

Figure 2.59

Slave output release time

tREL

10 (PCLKA >

32 MHz),

6 (PCLKA ≤

32 MHz)

tPcyc

Table 2.38

SCI timing (2) (2 of 2)

Parameter

Symbol

Min

Max

Unit

Test conditions

tSPCKWH

VOH

VOL

VOH

tSPCKWL

tSPCKr

tSPCKf

VOL

tSPcyc

tSPCKWH

VIH

VIL

VIH

tSPCKWL

tSPCKr

tSPCKf

VIL

tSPcyc

VOH = 0.7 × VCC, VOL = 0.3 × VCC, VIH = 0.7 × VCC, VIL = 0.3 × VCC

(n = 0 to 4, 9)

SCKn

master select

output

SCKn

slave select input

tDr, tDf

tSU

tOH

tOD

MSB IN

DATA

LSB IN

MSB IN

MSB OUT

DATA

LSB OUT

IDLE

MSB OUT

SCKn

CKPOL = 0

output

SCKn

CKPOL = 1

output

SMISOn

input

SMOSIn

output

(n = 0 to 4, 9)

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