TMS320DM6431 datasheet(96/227 Pages) TI1

96 / 227 page

3.7.3.8

Serial Port Block

TMS320DM6431

Digital Media Processor

SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

This block of 12 pins consists of McASP0, McBSP0, and GPIO muxed pins. The following register fields

select the pin functions in the Serial Port Block:

• PINMUX1.SPBK0

• PINMUX1.SPBK1

The Serial Port Block is further subdivided into these sub-blocks:

• Serial Port Sub-Block 0: McBSP0, part of McASP0, and GPIO.

• Serial Port Sub-Block 1: part of McASP0 and GPIO.

Table 3-31 summarizes the 12 pins in the Serial Port Block, the multiplexed function on each pin, and the

PINMUX configurations to select the corresponding function.

Table 3-31. Serial Port Block Muxed Pins Selection

MULTIPLEXED FUNCTIONS

SIGNAL NAME

McASP0

McBSP0

GPIO

FUNCTION

SELECT

FUNCTION

SELECT

FUNCTION

SELECT

Serial Port Sub-block 0

ACLKR0/CLKX0/GP[99]

ACLKR0

CLKX0

GP[99]

AFSR0/DR0/GP[100]

AFSR0

DR0

GP[100]

AHCLKR0/CLKR0/GP[101]

AHCLKR0

CLKR0

GP[101]

SPBK0 = 10

SPBK0 = 01

SPBK0 = 00

AXR0[3]/FSR0/GP[102]

AXR0[3]

FSR0

GP[102]

AXR0[2]/FSX0/GP[103]

AXR0[2]

FSX0

GP[103]

AXR0[1]/DX0/GP[104]

AXR0[1]

DX0

GP[104]

Serial Port Sub-block 1

AXR0[0]/GP[105]

AXR0[0]

–

GP[105]

ACLKX0/GP[106]

ACLKX0

–

GP[106]

AFSX0/GP[107]

AFSX0

–

GP[107]

SPBK1 = 10

SPBK1 = 00

AHCLKX0/GP[108]

AHCLKX0

–

GP[108]

AMUTEIN0/GP[109]

AMUTEIN0

–

GP[109]

AMUTE0/GP[110]

AMUTE0

–

GP[110]

As discussed in Section 3.7.3.2, Peripherals Spanning Multiple Pin Mux Blocks, the McBSP0 pins span

across two Pin Mux Blocks: Serial Port Sub-Block0, and Timer0 Block. For proper McBSP0 operation, the

Serial Port Sub-Block0 must be programmed to select McBSP0 function. The McBSP0 CLKS0 pin in the

Timer0 Block is optional for McBSP0 operation. CLKS0 is only needed if you desire using CLKS0 as an

external clock source to the McBSP0 internal sample rate generator.

Table 3-32 and Table 3-33 provide a different view of the Serial Port Block. Table 3-32 shows the Serial

Port Sub-Block 0 function based on PINMUX1.SPBK0 setting. Table 3-33 shows the Serial Port Sub-Block

1 function based on PINMUX1.SPBK1 setting. These selection options are also shown pictorially in

Figure 3-10.

Table 3-32. Serial Port Sub-Block 0 Function Selection

PINMUX1.SPBK0

BLOCK FUNCTION

RESULTING PIN FUNCTIONS

GPIO (6) (default)

GPIO: GP[104:99]

McBSP0

McBSP0: CLKX0, FSX0, DX0, CLKR0, FSR0, DR0

McASP0: ACLKR0, AFSR0, AHCLKR0, AXR0[3],

McASP0 Receive, 3 Serializers

AXR0[2], AXR0[1]

Reserved

Device Configurations

Submit Documentation Feedback

TMS320DM6431 Datasheet(PDF) 96 Page - Texas Instruments

TMS320DM6431 Datasheet(HTML) 96 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL