P89LPC933FDH datasheet(51/75 Pages) PHILIPS

51 / 75 page

9397 750 15113

Product data sheet

Rev. 06 — 20 June 2005

51 of 75

Philips Semiconductors

P89LPC933/934/935/936

8-bit microcontroller with accelerated two-clock 80C51 core

In addition, IAP operations can be accomplished through the use of four SFRs consisting

of a control/status register, a data register, and two address registers. Additional details

may be found in the

P89LPC933/934/935/936 User manual.

8.28.8 In-system programming

ISP is performed without removing the microcontroller from the system. The ISP facility

consists of a series of internal hardware resources coupled with internal ﬁrmware to

facilitate remote programming of the P89LPC933/934/935/936 through the serial port.

This ﬁrmware is provided by Philips and embedded within each P89LPC933/934/935/936

device. The Philips ISP facility has made ISP in an embedded application possible with a

minimum of additional expense in components and circuit board area. The ISP function

uses ﬁve pins (VDD, VSS, TXD, RXD, and RST). Only a small connector needs to be

available to interface your application to an external circuit in order to use this feature.

8.28.9 Power-on reset code execution

The P89LPC933/934/935/936 contains two special ﬂash elements: the boot vector and

the boot status bit. Following reset, the P89LPC933/934/935/936 examines the contents

of the boot status bit. If the boot status bit is set to zero, power-up execution starts at

location 0000H, which is the normal start address of the user’s application code. When

the boot status bit is set to a value other than zero, the contents of the boot vector are

used as the high byte of the execution address and the low byte is set to 00H.

Table 9 shows the factory default boot vector settings for these devices.

Remark: These settings are different than the original P89LPC932. Tools designed to

support the P89LPC933/934/935/936 should be used to program this device, such as

Flash Magic version 1.98, or later.

A factory-provided boot loader is preprogrammed into the address space indicated and

uses the indicated boot loader entry point to perform ISP functions. This code can be

erased by the user.

Remark: Users who wish to use this loader should take precautions to avoid erasing the

sector that contains this boot loader. Instead, the page erase function can be used to

erase the pages located in this sector which are not used by the boot loader.

A custom boot loader can be written with the boot vector set to the custom boot loader, if

desired.

Table 9:

Default boot vector values and ISP entry points

Device

Default

boot vector

Default

boot loader

entry point

Default boot loader

code range

Boot sector

range

P89LPC933

0FH

0F00H

0E00H to 0FFFH

0C00H to 0FFFH

P89LPC934

1FH

1F00H

1E00H to 1FFFH

1C00H to 1FFFH

P89LPC935

1FH

1F00H

1E00H to 1FFFH

1C00H to 1FFFH

P89LPC936

3FH

3F00H

3E00H to 3FFFH

3C00H to 3FFFH

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