AS2845D-8 datasheet(11/20 Pages) ETC

11 / 20 page

ASTEC Semiconductor

Current Mode Controller

AS2842/3/4/5

AC line. When the voltage on the capacitor (VCC)

reaches the upper UVLO threshold, the IC (and

hence, the power supply) turns on and the volt-

age on C begins to quickly discharge due to the

increased operating current. During this time, the

auxiliary winding begins to supply the current

necessary to run the IC. The capacitor must be

sufficiently large to maintain a voltage greater

than the lower UVLO threshold during start up.

The value of R must be selected to provide

greater than 1 mA of current at the minimum DC

bus voltage (R < VDCmin/1 mA).

The UVLO feature of the AS2842 has significant

advantages over standard 2842 devices. First,

the UVLO thresholds are based on a tempera-

ture compensated band gap reference rather

than conventional zeners. Second, the UVLO

disables the output at power down, offering addi-

tional protection in cases where VREG is heavily

decoupled. The UVLO on some 2842 devices

shuts down the 5 volt regulator only, which

results in eventual power down of the output only

after the 5 volt rail collapses. This can lead to

unwanted stresses on the switching devices dur-

ing power down. The AS2842 has two separate

comparators which monitor both VCC and VREF

and hold the output low if either are not within

specification.

The AS2842 family offers two different UVLO

options. The AS2842/4 has UVLO thresholds of

16 volts (on) and 10 volts (off). The AS2843/5 has

UVLO levels of 8.4 volts (on) and 7.6 volts (off).

1.2 Reference (VREG and VFB)

The AS2842 effectively has two precise band

gap based temperature compensated voltage

references. Most obvious is the VREG pin (pin 8)

which is the output of a series pass regulator.

This 5.0 V output is normally used to provide

charging current to the oscillator’s timing

capacitor (Section 1.3). In addition, there is a

trimmed internal 2.5 V reference which is con-

nected to the non-inverting (+) input of the error

amplifier. The tolerance of the internal reference

±0.5%overthefullspecifiedtemperaturerange,

and

±1% for VREG.

The reference section of the AS2842 is greatly

improved over the standard 2842 in a number of

ways. For example, in a closed loop system, the

voltage at the error amplifier’s inverting input

(VFB, pin 1) is forced by the loop to match the

voltage at the non-inverting input. Thus, VFB is

the voltage which sets the accuracy of the entire

system. The 2.5 V reference of the AS2842 is

tightly trimmed for precision at VFB, including

errors caused by the op amp, and is specified

over temperature. This method of trim provides a

precise reference voltage for the error amplifier

while maintaining the original 5 V regulator speci-

fications. In addition, force/sense (Kelvin) bond-

ing to the package pin is utilized to further im-

prove the 5 V load regulation. Standard 2842’s,

on the other hand, specify tight regulation for the

5 V output only and rate it over line, load and

temperature. The voltage at VFB, which is of

critical importance, is loosely specified and only

at 25

° C.

The reference section, in addition to providing a

precise DC reference voltage, also powers most

of the IC’s internal circuitry. Switching noise,

therefore, can be internally coupled onto the

reference. With this in mind, all of the logic within

the AS2842 was designed with ECL type circuitry

which generates less switching noise because it

runs at essentially constant current regardless of

logic state. This, together with improved AC

noise rejection, results in substantially less switch-

ing noise on the 5 V output.

The reference output is short circuit protected

and can safely deliver more than 20 mA to power

external circuitry.

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