V850ESLASHMA3 datasheet(37/226 Pages) NEC

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User’s Manual U14559EJ3V1UM

CHAPTER 4 ADDRESS SPACE

The V850E1 CPU supports a 4 GB linear address space. Both memory and I/O are mapped to this address space

(memory-mapped I/O). The V850E1 CPU (NB85E) outputs 32-bit addresses to the memory and I/O. The maximum

address is 232–1.

Byte data allocated to each address is defined with bit 0 as the LSB and bit 7 as the MSB. With regards to

multiple-byte data, the byte with the lowest address value is defined to be the LSB and the byte with the highest

address value is defined to be the MSB (little endian).

Data consisting of 2 bytes is called a halfword, and 4-byte data is called a word.

In this user’s manual, data consisting of 2 or more bytes is illustrated as shown below, with the lower address

shown on the right and the higher address on the left.

24 23

16 15

Data

Address

Data

Address

Data

Address

A+1

A+2

A+3

A+1

Word at

address A

............................................................................................

Halfword at

address A

......................................................................................................................................

Byte at

address A

.......

V850E/MA3 Datasheet(PDF) 37 Page - NEC