V850ESLASHMA3 datasheet(86/226 Pages) NEC

86 / 226 page

CHAPTER 5 INSTRUCTIONS

User’s Manual U14559EJ3V1UM

Load halfword unsigned

LD.HU

Load

Instruction format

LD.HU disp16 [reg1], reg2

Operation

adr

← GR [reg1] + sign-extend (disp16)

GR [reg2]

← zero-extend (Load-memory (adr, Halfword))

Format

Format VII

Opcode

rrrrr111111RRRRR

ddddddddddddddd1

ddddddddddddddd is the higher 15 bits of disp16.

Flag

–

SAT

–

Explanation

Adds the data of general-purpose register reg1 to a 16-bit displacement sign-extended to word

length to generate a 32-bit address. Halfword data is read from the generated address, zero-

extended to word length, and stored in general-purpose register reg2.

Caution

The result of adding the data of general-purpose register reg1 and the 16-bit displacement sign-

extended to word length can be of two types depending on the type of data to be accessed

(halfword, word), and the misalign mode setting.

•

Lower bits are masked to 0 and address is generated (when misaligned access is

disabled)

•

Lower bits are not masked and address is generated (when misaligned access is

enabled)

(when misaligned access is enabled for the type D, E, and F products)

For details on misaligned access, see 3.3 Data Alignment.

V850E/MA3 Datasheet(PDF) 86 Page - NEC