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LE58QL022BVC Datasheet (PDF) - Zarlink Semiconductor Inc

LE58QL022BVC Datasheet PDF - Zarlink Semiconductor Inc
Part # LE58QL022BVC
Download  LE58QL022BVC Download
File Size   593.18 Kbytes
Page   61 Pages
Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc
Description Quad Low Voltage Subscriber Line Audio-Processing Circuit VE580 Series

LE58QL022BVC Datasheet (PDF)

Go To PDF Page Download Datasheet
LE58QL022BVC Datasheet PDF - Zarlink Semiconductor Inc

Part # LE58QL022BVC
Download  LE58QL022BVC Click to download

File Size   593.18 Kbytes
Page   61 Pages
Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc
Description Quad Low Voltage Subscriber Line Audio-Processing Circuit VE580 Series

LE58QL022BVC Datasheet (HTML) - Zarlink Semiconductor Inc


LE58QL022BVC Product details

APPLICATIONS
„ Codec function on telephone switch line cards

FEATURES
„ Low-power, 3.3 V CMOS technology with 5 V tolerant
digital inputs
„ Software and coefficient compatible to the Am79Q02/
021/031 QSLAC device
„ Performs the functions of four codec/filters
„ Software programmable:
— SLIC input impedance
— Transhybrid balance
— Transmit and receive gains
— Equalization (frequency response)
— Digital I/O pins
— Programmable debouncing on one input
— Time slot assigner
— Programmable clock slot and PCM transmit clock edge
options
„ Standard microprocessor interface
„ A-law, µ-law, or linear coding
„ Single or Dual PCM ports available
— Up to 128 channels (PCLK at 8.192 MHz) per PCM port
— Optional supervision on the PCM highway
„ 1.536, 1.544, 2.048, 3.072, 3.088, 4.096, 6.144, 6.176, or
8.192 MHz master clock derived from MCLK or PCLK
„ Built-in test modes with loopback, tone generation,
and µP access to PCM data
„ Mixed state (analog and digital) impedance scaling
„ Performance guaranteed over a 12 dB gain range
„ Real Time Data register with interrupt (open drain or
TTL output)
„ Supports multiplexed SLIC device outputs
„ Broadcast state
„ 256 kHz or 293 kHz chopper clock for Legerity SLIC
devices with switching regulator
„ Maximum channel bandwidth for V.90 modems

RELATED LITERATURE
„ 080754 Le58QL061/063 QLSLAC™ Data Sheet
„ 080147 Le79Q02/021/031 QSLAC™ Data Sheet
„ 080193 Le79Q061/063 QSLAC™ Data Sheet
„ 080761 QSLAC™ to QLSLAC™ Design Conversion
Guide
„ 080758 QSLAC™ to QLSLAC™ Guide to New Designs

DESCRIPTION
The Le58QL022 Quad Low Voltage Subscriber Line AudioProcessing Circuit (QLSLAC™) devices integrate the key
functions of analog line cards into high-performance, veryprogrammable, four-channel codec-filter devices. The
QLSLAC devices are based on the proven design of Legerity’s
reliable SLAC™ device families. The advanced architecture of
the QLSLAC devices implements four independent channels
and employs digital filters to allow software control of
transmission, thus providing a cost-effective solution for the
audio-processing function of programmable line cards. The
QLSLAC devices are software and coefficient compatible to the
QSLAC devices.
Advanced submicron CMOS technology makes the
Le58QL022 QLSLAC devices economical, with both the
functionality and the low power consumption needed in line
card designs to maximize line card density at minimum cost.
When used with four Legerity SLIC devices, a QLSLAC device
provides a complete software-configurable solution to the
BORSCHT functions.




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