DA9063L datasheet(21/173 Pages) DIALOG

21 / 173 page

DA9063L

System PMIC for Mobile and Automotive Applications

Datasheet

DA9063L_2v1

05-Apr-2017

CFR0011-120-00

21 of 173

5.6

HS 2-Wire Control Bus

CLK/SK

DATA/SI

STH

CLKL

CLKH

DST

TSS

DHT

Figure 7: 2-Wire Bus Timing

Table 11: HS 2-Wire Control Bus Electrical Characteristics, TJ = -40 ºC to +125 ºC

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Bus free time STOP to START

0.5

µs

Bus line capacitive load

150

Standard/Fast/Fast+ Mode

CLK clock frequency

Note 1

1000

kHz

Bus free time STOP to START

0.5

µs

Start condition set-up time

0.26

µs

Start condition hold time

STH

0.26

µs

CLK low time

CLKL

0.5

µs

CLK high time

CLKH

0.26

µs

2-WIRE CLK and DATA rise

time

(input requirement)

1000

2-WIRE CLK and DATA fall

time

(input requirement)

300

Data set-up time

DST

Data hold-time

DHT

Data valid time

0.45

µs

Data valid time acknowledge

0.45

µs

Stop condition set-up time

TSS

0.26

µs

High Speed Mode

CLK clock frequency

Requires VDDIO ≥ 1.8 V

Note 1

3400

kHz

Start condition set-up time

160

Start condition hold time

STH

160

CLK low time

CLKL

160

CLK high time

CLKH

2-WIRE CLKH and SDAH

rise/fall time

Input requirement

160

DA9063L Datasheet(PDF) 21 Page - Dialog Semiconductor

DA9063L Datasheet(HTML) 21 Page - Dialog Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL