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PIC18F4539-E/MLSQTP Datasheet(PDF) 273 Page - Microchip Technology |
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PIC18F4539-E/MLSQTP Datasheet(HTML) 273 Page - Microchip Technology |
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273 / 322 page  2002 Microchip Technology Inc. Preliminary DS30485A-page 271 PIC18FXX39 FIGURE 23-6: CLKO AND I/O TIMING TABLE 23-6: CLKO AND I/O TIMING REQUIREMENTS Param. No. Symbol Characteristic Min Typ Max Units Conditions 10 TosH2ckL OSC1 ↑ to CLKO↓ —75 200 ns (Note 1) 11 TosH2ckH OSC1 ↑ to CLKO↑ —75 200 ns (Note 1) 12 TckR CLKO rise time — 35 100 ns (Note 1) 13 TckF CLKO fall time — 35 100 ns (Note 1) 14 TckL2ioV CLKO ↓ to Port out valid — — 0.5 TCY + 20 ns (Note 1) 15 TioV2ckH Port in valid before CLKO ↑ 0.25 TCY + 25 — — ns (Note 1) 16 TckH2ioI Port in hold after CLKO ↑ 0— — ns (Note 1) 17 TosH2ioV OSC1 ↑ (Q1 cycle) to Port out valid — 50 150 ns 18 TosH2ioI OSC1 ↑ (Q2 cycle) to Port input invalid (I/O in hold time) PIC18FXXXX 100 — — ns 18A PIC18LFXXXX 200 — — ns 19 TioV2osH Port input valid to OSC1 ↑ (I/O in setup time) 0 — — ns 20 TioR Port output rise time PIC18FXXXX —10 25 ns 20A PIC18LFXXXX — — 60 ns VDD = 2V 21 TioF Port output fall time PIC18FXXXX —10 25 ns 21A PIC18LFXXXX — — 60 ns VDD = 2V 22†† TINP INT pin high or low time TCY —— ns 23†† TRBP RB7:RB4 change INT high or low time TCY —— ns 24†† TRCP RC7:RC4 change INT high or low time 20 ns †† These parameters are asynchronous events not related to any internal clock edges. Note 1: Measurements are taken in RC mode, where CLKO output is 4 x TOSC. Note: Refer to Figure 23-4 for load conditions. OSC1 CLKO I/O Pin (input) I/O Pin (output) Q4 Q1 Q2 Q3 10 13 14 17 20, 21 19 18 15 11 12 16 Old Value New Value |
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