PIC18F4539-ESLASHMLSQTP datasheet(185/322 Pages) MICROCHIP

185 / 322 page

 2002 Microchip Technology Inc.

Preliminary

DS30485A-page 183

PIC18FXX39

The analog reference voltage is software selectable to

either the device’s positive and negative supply voltage

(VDD and VSS), or the voltage level on the RA3/AN3/

VREF+ pin and RA2/AN2/VREF- pin.

The A/D converter has a unique feature of being able

to operate while the device is in SLEEP mode. To oper-

ate in SLEEP, the A/D conversion clock must be

derived from the A/D’s internal RC oscillator.

The output of the sample and hold is the input into the

converter, which generates the result via successive

approximation.

A device RESET forces all registers to their RESET

state. This forces the A/D module to be turned off and

any conversion is aborted.

Each port pin associated with the A/D converter can be

configured as an analog input (RA3 can also be a

voltage reference) or as a digital I/O.

The ADRESH and ADRESL registers contain the result

of the A/D conversion. When the A/D conversion is

complete, the result is loaded into the ADRESH/

ADRESL registers, the GO/DONE bit (ADCON0<2>) is

cleared, and A/D interrupt flag bit, ADIF is set. The block

diagram of the A/D module is shown in Figure 18-1.

FIGURE 18-1:

A/D BLOCK DIAGRAM

(Input Voltage)

VAIN

VREF+

Reference

Voltage

VDD

PCFG<3:0>

CHS<2:0>

AN7*

AN6*

AN5*

AN4

AN3

AN2

AN1

AN0

111

110

101

100

011

010

001

000

10-bit

Converter

VREF-

VSS

A/D

* These channels are implemented only on the PIC18F4X39 devices.

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