S25FL032P datasheet(39/60 Pages) CYPRESS

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Document Number: 002-00650 Rev. *L

Page 39 of 60

S25FL032P

9.20

Release from Deep Power-Down (RES)

The device requires the Release from Deep Power-Down (RES) command to exit the Deep Power-Down mode. When the device is

in the Deep Power-Down mode, all commands except RES are ignored.

The host system must drive CS# low and write the RES command to SI. CS# must be driven low for the entire duration of the

sequence. The command sequence is shown in Figure 32 and Table 10 on page 18.

The host system must drive CS# high tRES(max) after the 8-bit RES command byte. The device transitions from DP mode to the

standby mode after a delay of tRES (see Figure 25). In the standby mode, the device can execute any read or write command.

Note: The RES command does not reset the Write Enable Latch (WEL) bit.

Figure 32. Release from Deep Power-Down (RES) Command Sequence

9.20.1

Release from Deep Power-Down and Read Electronic Signature (RES)

The device features an 8-bit Electronic Signature, which can be read using the RES command. See Figure 33 and Table 10 on page

18 for the command sequence and signature value. The Electronic Signature is not to be confused with the identification data

obtained using the RDID command. The device offers the Electronic Signature so that it can be used with previous devices that

offered it; however, the Electronic Signature should not be used for new designs, which should read the RDID data instead.

After the host system drives CS# low, it must write the RES command followed by 3 dummy bytes to SI (each bit is latched on SI

during the rising edge of SCK). The Electronic Signature is then output on SO; each bit is shifted out on the falling edge of SCK. The

RES operation is terminated by driving CS# high after the Electronic Signature is read at least once. Additional clock cycles on SCK

with CS# low cause the device to output the Electronic Signature repeatedly.

When CS# is driven high, the device transitions from DP mode to the standby mode after a delay of tRES, as previously described.

The RES command always provides access to the Electronic Signature of the device and can be applied even if DP mode has not

been entered. Any RES command issued while an erase, program, or Write Registers operation is in progress not executed, and the

operation continues uninterrupted.

Figure 33. Release from Deep Power-Down and RES Command Sequence

CS#

SCK

Command

Deep Power-down Mode

RES

Standby Mode

Mode 0

Hi-Z

Mode 3

CS#

SCK

3 Dummy Bytes

Hi-Z

MSB

Deep Power-Down Mode

Standby Mode

28 29 30 31 32

33 34 35 36

Electronic ID

Command

tRES

23 22 21

MSB

S25FL032P Datasheet(PDF) 39 Page - Cypress Semiconductor

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