PIC16F818-ESLASHML datasheet(99/176 Pages) MICROCHIP

99 / 176 page

 2004 Microchip Technology Inc.

DS39598E-page 97

PIC16F818/819

12.10.1

INT INTERRUPT

External interrupt on the RB0/INT pin is edge triggered,

either rising if bit INTEDG (OPTION_REG<6>) is set,

or falling if the INTEDG bit is clear. When a valid edge

appears

the

RB0/INT

pin,

flag

bit,

INTF

(INTCON<1>), is set. This interrupt can be disabled by

clearing enable bit, INTE (INTCON<4>). Flag bit INTF

must be cleared in software in the Interrupt Service

Routine before re-enabling this interrupt. The INT inter-

rupt can wake-up the processor from Sleep if bit INTE

was set prior to going into Sleep. The status of Global

Interrupt Enable bit, GIE, decides whether or not the

processor branches to the interrupt vector following

wake-up. See Section 12.13 “Power-Down Mode

(Sleep)” for details on Sleep mode.

12.10.2

TMR0 INTERRUPT

An overflow (FFh

→ 00h) in the TMR0 register will set

flag bit, TMR0IF (INTCON<2>). The interrupt can be

enabled/disabled

setting/clearing

enable

bit,

TMR0IE (INTCON<5>) (see Section 6.0 “Timer0

Module”).

12.10.3

PORTB INTCON CHANGE

An input change on PORTB<7:4> sets flag bit, RBIF

(INTCON<0>). The interrupt can be enabled/disabled

by setting/clearing enable bit, RBIE (INTCON<3>). See

Section 3.2 “EECON1 and EECON2 Registers”.

12.11 Context Saving During Interrupts

During an interrupt, only the return PC value is saved

on the stack. Typically, users may wish to save key

registers during an interrupt (i.e., W, Status registers).

This will have to be implemented in software as shown

in Example 12-1.

For PIC16F818 devices, the upper 64 bytes of each

bank are common. Temporary holding registers,

W_TEMP and STATUS_TEMP, should be placed here.

These 64 locations do not require banking and

therefore, make it easier for context save and restore.

For PIC16F819 devices, the upper 16 bytes of each

bank are common.

EXAMPLE 12-1:

SAVING STATUS AND W REGISTERS IN RAM

MOVWF

W_TEMP

;Copy W to TEMP register

SWAPF

STATUS, W

;Swap status to be saved into W

CLRF

STATUS

;bank 0, regardless of current bank, Clears IRP,RP1,RP0

MOVWF

STATUS_TEMP

;Save status to bank zero STATUS_TEMP register

:(ISR)

;Insert user code here

SWAPF

STATUS_TEMP, W

;Swap STATUS_TEMP register into W

;(sets bank to original state)

MOVWF

STATUS

;Move W into STATUS register

SWAPF

W_TEMP, F

;Swap W_TEMP

SWAPF

W_TEMP, W

;Swap W_TEMP into W

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