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LIS3L02DQ

6.7 CTRL_REG1 (20h)

6.8 CTRL_REG2 (21h)

PD1

PD0

DF1

DF0

ST

Zen

Yen

Xen

PD1, PD0

Power Down Control

(00: power-down mode; 01: device on)

DF1, DF0

Decimation Factor Control

(00: decimate by 128; 01: decimate by 64; 10: decimate by 32; 11: decimate by 8)

ST

Self Test Enable

(0: normal mode; 1: self-test active)

Zen

Z-axis enable

(0: axis off; 1: axis on)

Yen

Y-axis enable

(0: axis off; 1: axis on)

Xen

X-axis enable

(0: axis off; 1: axis on)

Res

BDU

BLE

BOOT

IEN

DRDY

SIM

DAS

Res

Reserved

BDU

Block Data Update

(0: continuous update; 1: output registers not updated until MSB and LSB reading)

BLE

Big/Little Endian selection

(0: little endian; 1: big endian)

BOOT

Reboot memory content

IEN

Interrupt ENable

(0: data ready on RDY pad; 1: int req on RDY pad)

DRDY

Enable Data-Ready generation

SIM

SPI Serial Interface Mode selection

(0: 4-wire interface; 1: 3-wire interface)

DAS

Data Alignment Selection

(0: 12 bit right justified; 1: 16 bit left justified)