HSP50214BVCZ datasheet(5/62 Pages) RENESAS

5 / 62 page

HSP50214B

FN4450 Rev 4.00

Page 5 of 62

May 1, 2007

DATARDY

Output Strobe Signal. Active Low. Indicates when new data from the Direct Output Port Section is available.

DATARDY is asserted for one PROCCLK cycle during the first clock cycle that data is available on the parallel out

busses. See Output Section.

OEAH

Output enable for the MSByte of the AOUT bus. Active Low. The AOUT MSByte outputs are three-stated when

OEAH is high.

OEAL

Output enable for the LSByte of the AOUT bus. Active Low. The AOUT LSByte outputs are three-stated when

OEAL is high.

OEBH

Output enable for the MSByte of the BOUT bus. Active Low. The BOUT MSByte outputs are three-stated when

OEBH is high.

OEBL

Output enable for the LSByte of the BOUT bus. Active Low. The BOUT LSByte outputs are three-stated when

OEBL is high.

SEL(2:0)

Select Address is used to choose which information in a data set from the Buffer RAM Output Port is sent to the

least significant bytes of AOUT and BOUT. SEL2 is the MSB.

INTRRP

Interrupt Output. Active Low. This output is asserted for 8 PROCCLK cycles when the Buffer RAM Output Port is

ready for reading.

SEROUTA

Serial Output Bus A Data. I, Q, magnitude, phase, frequency, timing error and AGC information can be sequenced

in programmable order. See Output Section and Microprocessor Write Section.

SEROUTB

Serial Output Bus B Data. Contents may be related to SEROUTA. I, Q, magnitude, phase, frequency, timing error

and AGC information can be sequenced in programmable order. See Output Section and Microprocessor Write

Section.

SERCLK

Output Clock for Serial Data Out. Derived from PROCCLK as given by Control Word 20 in the Microprocessor Write

Section.

SERSYNC

Serial Output Sync Signal. Serves as serial data strobes. See Output Section and Microprocessor Write Section.

SEROE

Serial Output Enable. When high, the SEROUTA, SEROUTB, SERCLK, and SERSYNC signals are set to a high

impedance.

C(7:0)

I/O

Processor Interface Data Bus. See Microprocessor Write Section. C7 is the MSB.

A(2:0)

Processor Interface Address Bus. See Microprocessor Write Section. A2 is the MSB.

Processor Interface Write Strobe. C(7:0) is written to Control Words selected by A(2:0) in the Programmable Down

Converter on the rising edge of this signal. See Microprocessor Write Section.

Processor Interface Read Strobe. C(7:0) is read from output or status locations selected by A(2:0) in the

Programmable Down Converter on the falling edge of this signal. See Microprocessor Read Section.

REFCLK

Reference Clock. Used as an input clock for the timing error detector. The timing error is computed relative to

REFCLK. REFCLK frequency must be less than or equal to PROCCLK/2.

MSYNCO

Multiple Chip Sync Output. Provided for synchronizing multiple parts when CLKIN and PROCCLK are

asynchronous. MSYNCO is the synchronization signal between the input section operating under CLKIN and the

back end processing operating under PROCCLK. This output sync signal from one part is connected to the MSYNCI

signal of all the HSP50214Bs.

MSYNCI

Multiple Chip Sync Input. The MSYNCI pin of all the parts should be tied to the MSYNCO of one part.

NOTE: MSYNCI must be connected to an MSYNCO signal for operation.

SYNCIN1

CIC Decimation/Carrier NCO Update Sync. Can be used to synchronize the CIC Section, carrier NCO update, or

both. See the Multiple Chip Synchronization Section and Control Word 0 in the Microprocessor Write Section. Active

High.

SYNCIN2

FIR/Timing NCO Update/AGC Gain Update Sync. Can be used to synchronize the FIR, Timing NCO update, AGC

gain update, or any combination of the above. See the Multiple Chip Synchronization Section and Control Words 7,

8, and 10 in the Microprocessor Write Section. Active High.

SYNCOUT

Strobe Output. This synchronization signal is generated by the

P interface for synchronizing multiple parts. Can be

generated by PROCLK or CLKIN (see Control Word 0 and Control Word 24 in the Microprocessor Write Section).

Active High.

Pin Descriptions (Continued)

NAME

TYPE

DESCRIPTION

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