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HSP50214BVCZ Datasheet(PDF) 1 Page - Renesas Technology Corp

Part # HSP50214BVCZ
Description  Programmable Downconverter
PDF  62 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HSP50214BVCZ Datasheet(HTML) 1 Page - Renesas Technology Corp

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FN4450 Rev 4.00
Page 1 of 62
May 1, 2007
FN4450
Rev 4.00
May 1, 2007
HSP50214B
Programmable Downconverter
DATASHEET
The HSP50214B Programmable Downconverter converts
digitized IF data into filtered baseband data which can be
processed by a standard DSP microprocessor. The
Programmable Downconverter (PDC) performs down
conversion, decimation, narrowband low pass filtering, gain
scaling, resampling, and Cartesian to Polar coordinate
conversion.
The 14-bit sampled IF input is down converted to baseband
by digital mixers and a quadrature NCO, as shown in the
Block Diagram. A decimating (4 to 32) fifth order Cascaded
Integrator-Comb (CIC) filter can be applied to the data
before it is processed by up to 5 decimate-by-2 halfband
filters. The halfband filters are followed by a 255-tap
programmable FIR filter. The output data from the
programmable FIR filter is scaled by a digital AGC before
being re-sampled in a polyphase FIR filter. The output
section can provide seven types of data: Cartesian (I, Q),
polar (R,
), filtered frequency (ddt), Timing Error (TE), and
AGC level in either parallel or serial format.
Features
• Up to 65MSPS Front-End Processing Rates (CLKIN) and
55MHz Back-End Processing Rates (PROCCLK)
Clocks May Be Asynchronous
• Processing Capable of >100dB SFDR
• Up to 255-Tap Programmable FIR
• Overall Decimation Factor Ranging from 4 to 16384
• Output Samples Rates to
12.94MSPS with Output
Bandwidths to
982kHz Lowpass
• 32-Bit Programmable NCO for Channel Selection and
Carrier Tracking
• Digital Resampling Filter for Symbol Tracking Loops and
Incommensurate Sample-to-Output Clock Ratios
• Digital AGC with Programmable Limits and Slew Rate to
Optimize Output Signal Resolution; Fixed or Auto Gain
Adjust
• Serial, Parallel, and FIFO 16-Bit Output Modes
• Cartesian to Polar Converter and Frequency Discriminator
for AFC Loops and Demodulation of AM, FM, FSK, and
DPSK
• Input Level Detector for External I.F. AGC Support
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Single Channel Digital Software Radio Receivers
• Base Station Rx’s: AMPS, NA TDMA, GSM, and CDMA
• Compatible with HSP50210 Digital Costas Loop for PSK
Reception
• Evaluation Platform Available
Ordering Information
PART NUMBER
PART MARKING
TEMP. RANGE (°C)
PACKAGE
PKG. DWG. NO.
HSP50214BVC
HSP50214BVC
0 to +70
120 Ld MQFP
Q120.28x28
HSP50214BVCZ (Note) HSP50214BVCZ
0 to +70
120 Ld MQFP (Pb-free) Q120.28x28
HSP50214BVI
HSP50214BVI
-40 to +85
120 Ld MQFP
Q120.28x28
HSP50214BVIZ (Note)
HSP50214BVIZ
-40 to +85
120 Ld MQFP (Pb-free) Q120.28x28
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.


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