ISL51002EVALZ datasheet(13/33 Pages) RENESAS

13 / 33 page

ISL51002

FN6164 Rev 3.00

Page 13 of 33

February 29, 2012

0x04

Interrupt Status,

Write a 1 to each bit to clear

it, 0xFF to clear all.

CH0 Sync Changed

0: No change

1: CH0 activity or polarity changed

CH1 Sync Changed

0: No change

1: CH1 activity or polarity changed

CH2 Sync Changed

0: No change

1: CH2 activity or polarity changed

Reserved

Ignore this bit

Selected Input Channel

Disrupted

0: No change

1: Currently selected Input Channel’s HSYNC or VSYNC

signal has changed (fast notification of a mode change)

Selected Input Channel

Changed

0: No change

1: Currently selected Input Channel’s HSYNC or VSYNC

period or pulse width has settled to a new value and can be

measured

VSYNC INT

0: Default state

1: VSYNC occurred

PADJ INT

0: Default state

1: Phase Adjustment function completed.

0x05

Interrupt Mask Register,

(0xFF)

CH0 Mask

0: Generate interrupt if CH0 sync activity, polarity, period, or

pulse width changes

1: Mask CH0 interrupt

CH1 Mask

0: Generate interrupt if CH1 sync activity, polarity, period, or

pulse width changes

1: Mask CH1 interrupt

CH2 Mask

0: Generate interrupt if CH2 sync activity, polarity, period, or

pulse width changes

1: Mask CH2 interrupt

Reserved

Set this bit to 1.

Input Disrupted Mask

0: Generate interrupt if selected Input Channel’s sync inputs

are disrupted

1: Mask Input Channel interrupt

Input Changed Mask

0: Generate interrupt after selected Input Channel period or

pulse width settles to new value

1: Mask Input Channel interrupt

VSYNC INT Mask

0: Generate interrupt every VSYNC

1: Mask VSYNC Interrupt

PADJ INT Mask

0: Generate interrupt upon phase adjustment block request

completion

1: Mask Phase adjustment interrupt

ADDRESS

(DEFAULT VALUE)

BITS

FUNCTION NAME

DESCRIPTION

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