AC104X-DS00-R datasheet(25/50 Pages) BOARDCOM

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Preliminary Data Sheet

■ AC104X

12/11/01

B roa dcom Co rpo rat ion

Document

AC104X-DS00-405-R

Section 3: Register Descriptions

Page 17

Table 11:

Registers 8-31

Description

Default

8-15

Reserved

XXXX

BT and Interrupt Level Control Register

1000

Interrupt Control/Status Register

0000

18,19

Reserved

XXXX

Cable measurement Capability Register

XXXX

Receive Error Counter Register

0000

22-31

Reserved

XXXX

Table 12:

Bit

Name

Description

Mode

Default

0.15

Reset

1 = PHY reset.

This bit is self-clearing.

RW/SC

0.14

Loopback

1 = Enable loopback mode. This loopbacks the TXD to RXD and

ignores all the activity on the cable media.

0 = Normal operation.

0.13

Speed

Select

1 = 100 Mbps 0 = 10 Mbps.

AutoNeg enabled: This bit is writable but will be ignored.

Set by

FORC100 pin

0.12

ANeg

Enable

1 = Enable Auto-Negotiate process (overrides 0.13 and 0.8)

0 = Disable Auto-Negotiate process. Mode selection is controlled

via bit 0.8, 0.13 or through the mode pins.

Set by

ANEGA

0.11

Power

Down

1 = Power down. All blocks except for SMI turns off. Setting

PWRDN pin to high achieves the same result.

0 = Normal operation.

0.10

Isolate

1 = Electrically isolate the PHY from MII. PHY is still able to

response to SMI.

0 = Normal operation.

0.9

Restart

ANeg

1 = Restart Auto-Negotiation process.

0 = Normal operation.

RW/SC

0.8

Duplex

Mode

1 = Full-duplex.

0 = Half-duplex.

AutoNeg enabled: This bit is writable but will be ignored.

The default value is 0 if auto-negotiation is enabled via pin ANEGA.

Set by DPLX

and ANEGA

0.7

Collision

Test

1 = Enable collision test, which issues the COL signal in response

to the assertion of TX_EN signal. Collision test is disabled if PCSBP

pin is high. Collision test is enabled regardless of the duplex mode.

0 = Disable COL test.

0.[6:0]

Reserved

0000000

AC104X-DS00-R Datasheet(PDF) 25 Page - Broadcom Corporation.

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