| Electronic Components Datasheet Search |
|
P89LPC913FDH Datasheet(PDF) 41 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
P89LPC913FDH Datasheet(HTML) 41 Page - NXP Semiconductors |
|
41 / 63 page ![]() Philips Semiconductors P89LPC912/913/914 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 03 — 17 December 2004 41 of 63 9397 750 14468 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. is output in the master mode and is input in the slave mode. If the SPI system is disabled, i.e. SPEN (SPCTL.6) = 0 (reset value), these pins are configured for port functions. • SS is the optional slave select pin. In a typical configuration, an SPI master asserts one of its port pins to select one SPI device as the current slave. An SPI slave device uses its SS pin to determine whether it is selected. Typical connections are shown in Figure 18, 19, and 20. • The 89LPC913 does not have the slave select pin, SS. The SPI interface is set to Master mode and an I/O pin may be used to implement the SS function. Typical connections are shown in Figure 18 and 19. 9.18.1 Typical SPI configurations Fig 18. SPI single master single slave configuration. 002aaa435 Master Slave 8-BIT SHIFT REGISTER SPI CLOCK GENERATOR 8-BIT SHIFT REGISTER MISO MOSI SPICLK PORT MISO MOSI SPICLK SS |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |