P89LPC913FDH datasheet(55/63 Pages) PHILIPS

55 / 63 page

Philips Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

Product data

Rev. 03 — 17 December 2004

55 of 63

9397 750 14468

tSPILEAD

Enable lead time (Slave)

see Figure 26,

3.0 MHz

250

tSPILAG

Enable lag time (Slave)

see Figure 26,

3.0 MHz

250

tSPICLKH

SPICLK high time

see Figure 24,

25, 26, 27

Master

⁄

CCLK

111

Slave

⁄

CCLK

167

tSPICLKL

SPICLK low time

see Figure 24,

25, 26, 27

Master

⁄

CCLK

111

Slave

⁄

CCLK

167

tSPIDSU

Data set-up time (Master or Slave) see Figure 24,

25, 26, 27

100

tSPIDH

Data hold time (Master or Slave)

see Figure 24,

25, 26, 27

100

tSPIA

Access time (Slave)

see Figure 26,

tSPIDIS

Disable time (Slave)

see Figure 26,

3.0 MHz

160

tSPIDV

Enable to output data valid

see Figure 24,

25, 26, 27

3.0 MHz

160

4.5 MHz

111

tSPIOH

Output data hold time

see Figure 24,

25, 26, 27

tSPIR

Rise time

see Figure 24,

25, 26, 27

SPI outputs (SPICLK, MOSI,

MISO)

100

SPI inputs (SPICLK, MOSI,

MISO, SS)

2000

Table 15:

AC characteristics (P89LPC912, P89LPC913)…continued

VDD = 3.0 V to 3.6 V, unless otherwise speciﬁed.

Tamb = −40 °Cto+85 °C for industrial, unless otherwise speciﬁed.[1]

Symbol

Parameter

Conditions

Variable clock

fosc =18MHz

Unit

Min

Max

Min

Max

P89LPC913FDH Datasheet(PDF) 55 Page - NXP Semiconductors

P89LPC913FDH Datasheet(HTML) 55 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

Datasheet Download

Link URL