P89LPC915FDH datasheet(39/72 Pages) PHILIPS

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Philips Semiconductors

P89LPC915/916/917

8-bit microcontrollers with accelerated two-clock 80C51 core

Product data

Rev. 04 — 17 December 2004

39 of 72

9397 750 14397

pin is driven LOW, it is driven strongly and able to sink a fairly large current. These

features are somewhat similar to an open-drain output except that there are three

pull-up transistors in the quasi-bidirectional output that serve different purposes.

The P89LPC915/916/917 is a 3 V device, but the pins are 5 V-tolerant. In

quasi-bidirectional mode, if a user applies 5 V on the pin, there will be a current

ﬂowing from the pin to VDD, causing extra power consumption. Therefore, applying

5 V in quasi-bidirectional mode is discouraged.

A quasi-bidirectional port pin has a Schmitt triggered input that also has a glitch

suppression circuit.

9.12.3

Open-drain output conﬁguration

The open-drain output conﬁguration turns off all pull-ups and only drives the

pull-down transistor of the port driver when the port latch contains a logic 0. To be

used as a logic output, a port conﬁgured in this manner must have an external

pull-up, typically a resistor tied to VDD.

An open-drain port pin has a Schmitt triggered input that also has a glitch

suppression circuit.

9.12.4

Input-only conﬁguration

The input-only port conﬁguration has no output drivers. It is a Schmitt triggered input

that also has a glitch suppression circuit.

9.12.5

Push-pull output conﬁguration

The push-pull output conﬁguration has the same pull-down structure as both the

open-drain and the quasi-bidirectional output modes, but provides a continuous

strong pull-up when the port latch contains a logic 1. The push-pull mode may be

used when more source current is needed from a port output. A push-pull port pin

has a Schmitt triggered input that also has a glitch suppression circuit.

9.12.6

Port 0 analog functions

The P89LPC915/916/917 incorporates two Analog Comparators. In order to give the

best analog function performance and to minimize power consumption, pins that are

being used for analog functions must have the digital outputs and digital inputs

disabled.

Digital outputs are disabled by putting the port output into the Input-Only (high

impedance) mode as described in Section 9.12.4 “Input-only conﬁguration”.

Digital inputs on Port 0 may be disabled through the use of the PT0AD register. On

any reset, the PT0AD bits default to logic 0s to enable digital functions.

P89LPC915FDH Datasheet(PDF) 39 Page - NXP Semiconductors

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