RFPIC12C509AF datasheet(19/104 Pages) MICROCHIP

19 / 104 page

Preliminary

DS70031A-page 17

rfPIC12C509AG/509AF

4.2.2

SPECIAL FUNCTION REGISTERS

The Special Function Registers (SFRs) are registers

used by the CPU and peripheral functions to control the

operation of the device (Table 4-1).

The special registers can be classified into two sets.

The special function registers associated with the

“core” functions are described in this section. Those

related to the operation of the peripheral features are

described in the section for each peripheral feature.

TABLE 4-1:

SPECIAL FUNCTION REGISTER (SFR) SUMMARY

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

Power-on

Reset

Value on

All Other

RESETS

(2)

N/A

TRIS

—

--11 1111

N/A

OPTION

Contains control bits to configure Timer0, Timer0/WDT

prescaler, wake-up on change, and weak pull-ups

1111 1111

00h

INDF

Uses contents of FSR to address data memory (not a physical register)

xxxx xxxx

uuuu uuuu

01h

TMR0

8-bit real-time clock/counter

xxxx xxxx

uuuu uuuu

02h(1)

PCL

Low order 8 bits of PC

1111 1111

03h

STATUS

GPWUF

—PA0

ZDC

0001 1xxx

q00q quuu(3)

04h

FSR

Indirect data memory address pointer

110x xxxx

11uu uuuu

05h

OSCCAL

CAL5

CAL4

CAL3

CAL2

CAL1

CAL0

—

1000 00--

uuuu uu--

06h

GPIO

—

GP5

GP4

GP3

GP2

GP1

GP0

--xx xxxx

--uu uuuu

Legend: Shaded boxes = unimplemented or unused, — = unimplemented, read as '0' (if applicable)

= unknown, u = unchanged, q = see the tables in Section 8.7 for possible values.

Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.6 for an explanation of how

to access these bits.

2: Other (non power-up) RESETS include external RESET through MCLR, Watchdog Timer and Wake-up-on-

Pin Change Reset.

3: If RESET was due to Wake-up-on-Pin Change then bit 7 = 1. All other RESETS will cause bit 7 = 0.

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