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DSP56857 Datasheet(PDF) 376 Page - Freescale Semiconductor, Inc |
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DSP56857 Datasheet(HTML) 376 Page - Freescale Semiconductor, Inc |
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376 / 662 page  Module Memory Map 5685X Digital Signal Controller User Manual, Rev. 4 13-10 Freescale Semiconductor 13.8 Module Memory Map There are eight registers on the TMR peripheral described in Table 13-1. Table 13-1. TMR Module Memory Map (TMR_BASE = $1FFE80) Address Offset Register Acronym Register Name Access Type Chapter Location Base + $0, $8, $10, $18 CMP1 Timer Channel Compare Register 1 Read/Write Section 13.9.3 Base + $1, $9, $11, $19 CMP2 Timer Channel Compare Register 2 Read/Write Section 13.9.4 Base + $2, $A, $12, $1A CAP Timer Channel Capture Register Read/Write Section 13.9.5 Base + $3, $B, $13, $1B LOAD Timer Channel Load Register Read/Write Section 13.9.6 Base + $4, $C, $14, $1C HOLD Timer Channel Hold Register Read/Write Section 13.9.7 Base + $5, $D, $15, $1D CNTR Timer Channel Counter Register Read/Write Section 13.9.8 Base + $6, $E, $16, $1E CTRL Timer Channel Control Register Read/Write Section 13.9.1 Base + $7, $F, $17, $F SCR Timer Channel Status/Control Reg. Read/Write Section 13.9.2 Add. Offset Register Name 15 14 13 12 11 10 9 87654321 0 $0, $8, $10, $18 CMP1 R COMPARISON VALUE W $1, $9, $11, $19 CMP2 R COMPARISON VALUE W $2, $A, $12, $1A CAP R CAPTURE VALUE W $3, $B, $13, $1B LOAD R LOAD VALUE W $4, $C, $14, $1C HOLD R HOLD VALUE W $5, $D, $15, $1D CNTR R COUNTER W $6, $E, $16, $1E CTL R CM PCS SCS ONCE LENGTH DIR EXT INIT OM (OFLAG) W $7, $F, $17, $1F SCR R TCF TCFIE TOF TOFIE IEF IEFIE IPS INPUT CAPTURE MODE MSTR EEOF VAL OPS OEN FORCE R 0 Read as 0 W Reserved Figure 13-3. TMR Register Map Summary |
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