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RTL8019AS Datasheet(PDF) 13 Page - Realtek Semiconductor Corp. |
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RTL8019AS Datasheet(HTML) 13 Page - Realtek Semiconductor Corp. |
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13 / 51 page  RTL8019AS Datasheet 2005-08-26 13 IMR: Interrupt Mask Register (0FH; Type=W in Page0, Type=R in Page2) All bits correspond to the bits in the ISR register. POWER UP=all 0s. Setting individual bits will enable the corresponding interrupts. DCR: Data Configuration Register (0EH; Type=W in Page0, Type=R in Page2) Bit Symbol Description 7 - Always 1 6, 5 FT1, FT0 FIFO threshold select bit 1 and 0. 4 ARM Auto-initialize Remote 0: Send Packet Command not executed. 1: Send Packet Command executed. 3 LS Loopback Select 0: Loopback mode selected. Bits 1 and 2 of the TCR must also be programmed for Loopback operation. 1: Normal Operation 2 LAS This bit must be set to zero. NIC only supports dual 16-bit DMA mode. POWER UP =1 1 BOS Byte Order Select (Not implement) 0: MS byte placed on MD15-8 and LS byte on MD7-0. (32xxx,80x86) 1: MS byte placed on MD7-0 and LS byte on MD15-8. (680x0) 0 WTS Word Transfer Select 0: byte-wide DMA transfer 1: word-wide DMA transfer TCR: Transmit Configuration Register (0DH; Type=W in Page0, Type=R in Page2) Bit Symbol Description 7 - Always 1 6 - Always 1 5 - Always 1 4 OFST Collision Offset Enable. 3 ATD Auto Transmit Disable. 0: normal operation 1: reception of multicast address hashing to bit 62 disables transmitter, reception of multicast address hashing to bit 63 enables transmitter. 2, 1 LB1, LB0 LB1 LB0 Mode Remark 0 0 0 Normal Operation 0 1 1 Internal Lookback 1 0 2 External Lookback 1 1 3 External Lookback 0 CRC The NIC CRC logic comprises a CRC generator for transmitter and a CRC checker for receiver. This bit controls the activity of the CRC logic. If this bit set, CRC is inhibited by transmitter. Otherwise CRC is appended by transmitter. Conditions CRC Logic Activities CRC Bit Mode CRC Generator CRC Checker 0 normal enabled enabled 1 normal disabled enabled 0 loopback enabled disabled 1 loopback disabled enabled TSR:Transmit Status Register (04H; Type=R in Page0) This register indicates the status of a packet transmission. |
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