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S1M8822X01-R0T0 Datasheet(PDF) 5 Page - Samsung semiconductor |
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S1M8822X01-R0T0 Datasheet(HTML) 5 Page - Samsung semiconductor |
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5 / 22 page ![]() INTERGER RF/IF DUAL PLL S1M8821/22/23 5 PIN CONFIGURATION(24-QFN, NOT TO SCALE) NOTES: 1 pin #10 = pin #19(internally connected). 2. Do not tie up Vp and VDD : Vp is the source of digital noises. The power for analog part is supplied by VDD. If Vp and VDD are tied together, noisy Vp corrupts the power source for the analog part. VDD1 Vp1 CPoRF GND finRF finRF GND OSCin GND foLD VDD2 Vp2 CPoIF GND finIF finIF GND LE DATA CLOCK 1 8 24 7 6 5 4 3 2 23 9 22 21 20 19 18 17 16 15 14 13 12 10 11 N/C N/C N/C N/C S1M8822 S1M8823 S1M8821 (24-QFN) Package 24-QFN 24 PIN Quad Flat Non-leaded (Digital) (Digital) (Digital) (Analog) (Analog) * N/C pins must be connected to GND(to Analog GND if possible). |
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