S1M8821/22/23

INTERGER RF/IF DUAL PLL

14

PROGRAMMING DESCRIPTION

Control Bits

Programmable Reference Counter(IF / RF R Counter)

If the Control Bits are 00(IF) or 01(RF), data is moved from the 20-bit shift register into the R-latch which sets the

reference counter. Serial data format is shown in the table below.

•

15-Bit Programmable Reference Counter Ratio

Division ratio : 3 to 32767

Data are shifted in MSB first

Control Bits

DATA Location

C1

C2

0

0

IF R Counter

0

1

RF R Counter

1

0

IF N Counter

1

1

RF N Counter

Division

Ratio

R

15

R

14

R

13

R

12

R

11

R

10

R

9

R

8

R

7

R

6

R

5

R

4

R

3

R

2

R

1

3

000000000000011

4

000000000000100

²

²²²²²²²²²²²²²²²

32767

111111111111111

C1

C2

R

1

R

2

R

3

R

4

R

5

R

6

R

7

R

8

R

9

R

10

R

11

R

12

R

13

R

14

R

15

R

16

R

17

R

18

R

19

R

20

LSB

MSB

Program Modes

Division Ratio of the R Counter, R

Control Bits