56F8167 datasheet(121/184 Pages) FREESCALE

121 / 184 page

56F8367 Technical Data, Rev. 7.0

Freescale Semiconductor

121

Preliminary

Figure 6-10 Overall Control of GPIOC Pads Using SIM_GPS Control

Two Input/Output pins associated with GPIOD can function as GPIO, EMI (default peripheral) or CAN2

(NOT available on the 56F8167 device) signals. GPIO is the default and is enabled/disabled via the

GPIOD_PER, as shown in Figure 6-11 and Table 6-3. When GPIOD[1:0] are programmed to operate as

peripheral input/output, then the choice between EMI and CAN2 inputs/outputs is made here in the GPS.

Table 6-2 Control of GPIOC Pads Using SIM_GPS Control 1

1. This applies to the four pins that serve as Quad Decoder / Quad Timer / SPI / GPIOC functions. A separate set of control bits is

used for each pin.

Pin Function

Control Registers

Comments

GPIO Input

—

GPIO Output

—

Quad Timer Input / Quad

Decoder Input 2

2. Reset configuration

—

See the “Switch Matrix for Inputs to the Timer”

table in the 56F8300 Peripheral User Manual

for the definition of timer inputs based on the

Quad Decoder mode configuration.

Quad Timer Output / Quad

Decoder Input 3

3. Quad Decoder pins are always inputs and function in conjunction with the Quad Timer pins.

1—

SPI input

—

See SPI controls for determining the direction

of each of the SPI pins.

SPI output

—

GPIOC_PER Register

GPIO Controlled

I/O Pad Control

SIM_ GPS Register

Quad Timer Controlled

SPI Controlled

56F8167 Datasheet(PDF) 121 Page - Freescale Semiconductor, Inc

56F8167 Datasheet(HTML) 121 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL