56F8167 datasheet(125/184 Pages) FREESCALE

125 / 184 page

56F8367 Technical Data, Rev. 7.0

Freescale Semiconductor

125

Preliminary

6.5.9.9

Quad Timer B Enable (TMRB)—Bit 7

Each bit controls clocks to the indicated peripheral.

•

1 = Clocks are enabled

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

6.5.9.10

Quad Timer A Enable (TMRA)—Bit 6

Each bit controls clocks to the indicated peripheral.

•

1 = Clocks are enabled

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

6.5.9.11

Serial Communications Interface 1 Enable (SCI1)—Bit 5

Each bit controls clocks to the indicated peripheral.

•

1 = Clocks are enabled

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

6.5.9.12

Serial Communications Interface 0 Enable (SCI0)—Bit 4

Each bit controls clocks to the indicated peripheral.

•

1 = Clocks are enabled

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

6.5.9.13

Serial Peripheral Interface 1 Enable (SPI1)—Bit 3

Each bit controls clocks to the indicated peripheral.

•

1 = Clocks are enabled

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

6.5.9.14

Serial Peripheral Interface 0 Enable (SPI0)—Bit 2

Each bit controls clocks to the indicated peripheral.

•

1 = Clocks are enabled

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

6.5.9.15

Pulse Width Modulator B Enable (PWMB)—1

Each bit controls clocks to the indicated peripheral.

•

1 = Clocks are enabled

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

6.5.9.16

Pulse Width Modulator A Enable (PWMA)—0

Each bit controls clocks to the indicated peripheral.

•

1 = Clocks are enabled

•

0 = The clock is not provided to the peripheral (the peripheral is disabled)

56F8167 Datasheet(PDF) 125 Page - Freescale Semiconductor, Inc

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