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SAFC161PI Datasheet(PDF) 34 Page - Infineon Technologies AG |
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SAFC161PI Datasheet(HTML) 34 Page - Infineon Technologies AG |
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34 / 400 page ![]() &3, $UFKLWHFWXUDO2YHUYLHZ User’s Manual 2-18 1999-08 2.4 Power Management Features The known basic power reduction modes (Idle and Power Down) are enhanced by a number of additional power management features (see below). These features can be combined to reduce the controller’s power consumption to the respective application’s possible minimum. • Flexible clock generation • Flexible peripheral management (peripherals can be dis/unabled separately or in groups) • Periodic wakeup from Idle mode via RTC timer The listed features provide effective means to realize standby conditions for the system with an optimum balance between power reduction (i.e. standby time) and peripheral operation (i.e. system functionality). Flexible Clock Generation The flexible clock generation system combines a variety of improved mechanisms (partly user controllable) to provide the C161PI modules with clock signals. This is especially important in power sensitive modes like standby operation. The power optimized oscillator generally reduces the amount of power which is consumed in order to generate the clock signal within the C161PI. The clock system efficiently controls the amount of power which is consumed in order to distribute the clock signal within the C161PI. Slowdown operation is achieved by dividing the oscillator clock by a programmable factor (1...32) resulting in a low frequency device operation which significantly reduces the overall power consumption. Flexible Peripheral Management The flexible peripheral management provides a mechanism to enable and disable each peripheral module separately. In each situation (e.g. several system operating modes, standby, etc.) only those peripherals may be kept running which are required for the respective functionality. All others can be switched off. It also allows the operation control of whole groups of peripherals including the power required for generating and distributing their clock input signal. Other peripherals may remain active, e.g. in order to maintain communication channels. The registers of separately disabled peripherals (not within a disabled group) can still be accessed. |
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