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PIC16F917E/ML301 Datasheet(PDF) 43 Page - Microchip Technology |
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PIC16F917E/ML301 Datasheet(HTML) 43 Page - Microchip Technology |
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43 / 272 page ![]() © 2005 Microchip Technology Inc. Preliminary DS41250E-page 41 PIC16F917/916/914/913 3.2 PORTB and TRISB Registers PORTB is a general purpose I/O port with similar functionality as the PIC16F77. All PORTB pins can have a weak pull-up feature, and PORTB<7:4> implements an interrupt-on-input change function. PORTB is also used for the Serial Flash programming interface. EXAMPLE 3-2: INITIALIZING PORTB 3.3 Additional PORTB Pin Functions RB<7:6> are used as data and clock signals, respectively, for both serial programming and the in-circuit debugger features on the device. Also, RB0 can be configured as an external interrupt input. 3.3.1 WEAK PULL-UPS Each of the PORTB pins has an individually configurable internal weak pull-up. Control bits WPUB<7:0> enable or disable each pull-up. Refer to Register 3-6. Each weak pull-up is automatically turned off when the port pin is configured as an output. The pull-ups are disabled on a Power-on Reset by the RBPU bit (OPTION_REG<7>). 3.3.2 INTERRUPT-ON-CHANGE Four of the PORTB pins are individually configurable as an interrupt-on-change pin. Control bits IOCB<7:4> enable or disable the interrupt function for each pin. Refer to Register 3-5. The interrupt-on-change feature is disabled on a Power-on Reset. For enabled interrupt-on-change pins, the values are compared with the old value latched on the last read of PORTB. The ‘mismatch’ outputs of the last read are OR’d together to set the PORTB Change Interrupt flag bit (RBIF) in the INTCON register (Register 2-3). This interrupt can wake the device from Sleep. The user, in the Interrupt Service Routine, clears the interrupt by: a) Any read or write of PORTB. This will end the mismatch condition. b) Clear the flag bit RBIF. A mismatch condition will continue to set flag bit RBIF. Reading or writing PORTB will end the mismatch con- dition and allow flag bit RBIF to be cleared. The latch holding the last read value is not affected by a MCLR nor Brown-out Reset. After these Resets, the RBIF flag will continue to be set if a mismatch is present. Note: Analog lines that carry LCD signals (i.e., SEGx, COMy, where x and y are seg- ment and common identifiers) are shown as direct connections to the device pins. The signals are outputs from the LCD module and may be tri-stated, depending on the configuration of the LCD module. BCF STATUS,RP0 ;Bank 0 BCF STATUS,RP1 ; CLRF PORTB ;Init PORTB BSF STATUS,RP0 ;Bank 1 BCF STATUS,RP1 ; MOVLW FFh ;Set RB<7:0> as inputs MOVWF TRISB ; BCF STATUS,RP0 ;Bank 0 BCF STATUS,RP1 ; Note: If a change on the I/O pin should occur when the read operation is being executed (start of the Q2 cycle), then the RBIF interrupt flag may not get set. Furthermore, since a read or write on a port affects all bits of that port, care must be taken when using multiple pins in Interrupt-on-change mode. Changes on one pin may not be seen while servicing changes on another pin. |
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