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STM32G47PBY3XXX Datasheet(PDF) 25 Page - STMicroelectronics |
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STM32G47PBY3XXX Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 229 page  DS12712 Rev 3 25/229 STM32G473xB STM32G473xC STM32G473xE Functional overview 46 3.12 Interconnect matrix Several peripherals have direct connections between them. This allows autonomous communication between peripherals, saving CPU resources thus power supply consumption. In addition, these hardware connections allow fast and predictable latency. Depending on peripherals, these interconnections can operate in Run, Sleep and Stop modes. Table 3. STM32G473xB/xC/xE peripherals interconnect matrix Interconnect source Interconnect destination Interconnect action TIMx TIMx Timers synchronization or chaining Y Y Y Y - ADCx DACx Conversion triggers Y Y Y Y - DMA Memory to memory transfer trigger Y Y Y Y - COMPx Comparator output blanking Y Y Y Y - TIM16/TIM17 IRTIM Infrared interface output generation Y Y Y Y - COMPx TIM1, 8, 20 TIM2, 3, 4, 5 Timer input channel, trigger, break from analog signals comparison YY YY - LPTIMER1 Low-power timer triggered by analog signals comparison YY YY Y ADCx TIM1, 8, 20 Timer triggered by analog watchdog Y Y Y Y - RTC TIM16 Timer input channel from RTC events Y Y Y Y - LPTIMER1 Low-power timer triggered by RTC alarms or tampers YY YY Y All clocks sources (internal and external) TIM5, TIM15, 16, 17 Clock source used as input channel for RC measurement and trimming YY YY - USB TIM2 Timer triggered by USB SOF Y Y - - - CSS RAM (parity error) Flash memory (ECC error) COMPx PVD TIM1,8, 20 TIM15,16,17 Timer break Y Y Y Y - CPU (hard fault) TIM1,8,20 TIM15/16/17 Timer break Y Y Y Y - |
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