ADRV9009-WSLASHPCBZ datasheet(21/127 Pages) AD

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Data Sheet

ADRV9009

Rev. B | Page 21 of 127

Pin No.

Type

Mnemonic

Description

L12

Input/

output

GPIO_8

Digital GPIO, 1.8 V to 2.5 V. Because this pin contains an input stage, the

voltage on the pin must be controlled. When unused, this pin can be

tied to ground through a resistor (to safeguard against misconfiguration),

or it can be left floating, programmed as output, and driven low.

M10

Input/

output

GPIO_17

Digital GPIO, 1.8 V to 2.5 V. Because this pin contains an input stage, the

voltage on the pin must be controlled. When unused, this pin can be

tied to ground through a resistor (to safeguard against misconfiguration),

or it can be left floating, programmed as output, and driven low.

M11

Input/

output

GPIO_16

Digital GPIO, 1.8 V to 2.5 V. Because this pin contains an input stage, the

voltage on the pin must be controlled. When unused, this pin can be

tied to ground through a resistor (to safeguard against misconfiguration),

or it can be left floating, programmed as output, and driven low.

H14, J14

Output

TX1_OUT+, TX1_OUT−

Transmitter 1 Output. When unused, do not connect these pins.

H1, J1

Output

TX2_OUT−, TX2_OUT+

Transmitter 2 Output. When unused, do not connect these pins.

Input

RESET

Active Low Chip Reset.

Output

GP_INTERRUPT

General-Purpose Digital Interrupt Output Signal. When unused, do

not connect this pin.

Input

TEST

Pin Used for JTAG Boundary Scan. When unused, connect this pin to

ground.

Input/

output

SDIO

Serial Data Input in 4-Wire Mode or Input/Output in 3-Wire Mode.

J10

Output

SDO

Serial Data Output. In SPI 3-wire mode, do not connect this pin.

K3, K4

Input

SYSREF_IN+, SYSREF_IN−

LVDS Input.

Input

SCLK

Serial Data Bus Clock.

K10

Input

Serial Data Bus Chip Select, Active Low.

L3, L4

Input

SYNCIN1−, SYNCIN1+

LVDS Input. These pins form the sync signal associated with receiver

channel data on the JESD204B interface. When unused, connect these

pins to ground with a pull-down resistor, or connect these pins directly to

ground.

L7, L10

Input

VSSD

Digital VSS.

L8, L9

Input

VDDD1P3_DIG

1.3 V Digital Core. Connect Pin L8 and Pin L9 together. Use a wide

trace to connect to a separate power supply domain.

L13, L14

Output

SYNCOUT1−, SYNCOUT1+

LVDS Output. These pins form the sync signal associated with transmitter

channel data on the JESD204B interface. When unused, do not connect

these pins.

Input

VDDA1P1_CLOCK_VCO

1.1 V VCO Supply. Decouple this pin with 1 μF.

M3, M4

Input

SYNCIN0−, SYNCIN0+

LVDS Input. These pins form the sync signal associated with receiver

channel data on the JESD204B interface. When unused, connect these

pins to ground with a pull-down resistor, or connect these pins directly to

ground.

Input

RX1_ENABLE

Receiver 1 Enable Pin. When unused, connect this pin to ground with a

pull-down resistor, or connect this pin directly to ground.

Input

TX1_ENABLE

Transmitter 1 Enable Pin. When unused, connect this pin to ground

with a pull-down resistor, or connect this pin directly to ground.

Input

RX2_ENABLE

Receiver 2 Enable Pin. When unused, connect this pin to ground with a

pull-down resistor, or connect this pin directly to ground.

Input

TX2_ENABLE

Transmitter 2 Enable Pin. When unused, connect this pin to ground

with a pull-down resistor, or connect this pin directly to ground.

M12

Input

VDD_INTERFACE

Input/Output Interface Supply, 1.8 V to 2.5 V.

M13, M14

Output

SYNCOUT0−, SYNCOUT0+

LVDS Output. These pins form the sync signal associated with transmitter

channel data on the JESD204B interface. When unused, do not connect

these pins.

ADRV9009-W/PCBZ Datasheet(PDF) 21 Page - Analog Devices

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