Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

MCP6V51-E/MS Datasheet(PDF) 22 Page - Microchip Technology

Part # MCP6V51-E/MS
Description  45V, 2 MHz Zero-Drift Op Amp with EMI Filtering
PDF  43 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP6V51-E/MS Datasheet(HTML) 22 Page - Microchip Technology

Back Button MCP6V51-E/MS Datasheet HTML 18Page - Microchip Technology MCP6V51-E/MS Datasheet HTML 19Page - Microchip Technology MCP6V51-E/MS Datasheet HTML 20Page - Microchip Technology MCP6V51-E/MS Datasheet HTML 21Page - Microchip Technology MCP6V51-E/MS Datasheet HTML 22Page - Microchip Technology MCP6V51-E/MS Datasheet HTML 23Page - Microchip Technology MCP6V51-E/MS Datasheet HTML 24Page - Microchip Technology MCP6V51-E/MS Datasheet HTML 25Page - Microchip Technology MCP6V51-E/MS Datasheet HTML 26Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 22 / 43 page
background image
MCP6V51
DS20006136A-page 22
 2018 Microchip Technology Inc.
4.2
Other Functional Blocks
4.2.1
INPUT PROTECTION
The MCP6V51 can be operated on a single supply
voltage ranging from 4.5V to 45V, or in a split-supply
application (+/-2.25V to +/- 22.5V). The input common-
mode range extends below the negative rail,
VCML =VSS - 0.3V at 25°C, while maintaining high
CMRR (135 dB min. at 45VDD). The upper range of the
input common-mode is limited to VCMH =VDD -2.1V.
To ensure proper operation, these VCM limits, along
with any potential overvoltage/current conditions as
described in the following paragraphs, should be taken
into consideration.
4.2.1.1
Phase Reversal
The input devices are designed to not exhibit phase
inversion when the input pins exceed the supply
voltages. Figure 2-37 shows an input voltage
exceeding both supplies with no phase inversion.
4.2.1.2
Input Voltage Limits
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see Section 1.1, Absolute Maximum
Ratings †). This requirement is independent of the
current limits discussed later on.
The ESD protection on the inputs can be depicted as
shown in Figure 4-4. This structure was chosen to
protect the input transistors against many (but not all)
overvoltage conditions and to minimize input bias
current (IB).
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages well above VDD; their breakdown
voltage is high enough to allow normal operation but
not low enough to protect against slow overvoltage
(beyond VDD) events. Very fast ESD events (that meet
the specification) are limited so that damage can
largely be prevented.
FIGURE 4-4:
Simplified Analog Input ESD
Structures.
In addition, the input is protected by a pair of back-to-
back diodes across the amplifier’s inputs, which will
limit the voltage that can develop across the inputs to
about +/-1V.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-5 shows one approach of protecting these
inputs. D1 and D2 may be small-signal silicon diodes,
Schottky diodes for lower clamping voltages or
diode-connected FETs for low leakage.
FIGURE 4-5:
Protecting the Analog Inputs
against High Voltages.
4.2.1.3
Input Current Limits
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
into the input pins (see Section 1.1, Absolute
Maximum
Ratings †).
This
requirement
is
independent of the voltage limits discussed previously.
Figure 4-6 shows one approach to protecting these
inputs. The R1 and R2 resistors limit the possible
current in or out of the input pins (and into D1 and D2).
Once the diode is forward biased, any current will flow
into the VDD supply line.
FIGURE 4-6:
Protecting the Analog Inputs
Against High Currents.
Bond
Pad
Bond
Pad
Bond
Pad
VDD
VIN+
VSS
Input
Stage
Bond
Pad
VIN-
V1
VDD
D1
VOUT
V2
D2
U1
MCP6V51
+
-
V1
R1
VDD
D1
VOUT
V2
R2
D2
U1
MCP6V51
+
-
min(R1 R2
VSS min V1 V2

–
10 mA
--------------------------------------------
min(R1 R2
max V1 V2
 V
DD
–
10 mA
------------------------------------------------



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com