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IMXRT1160CEC Datasheet(PDF) 62 Page - NXP Semiconductors |
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IMXRT1160CEC Datasheet(HTML) 62 Page - NXP Semiconductors |
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62 / 124 page ![]() i.MX RT1160 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 04/2021 62 NXP Semiconductors Electrical characteristics Figure 22. FlexSPI input timing in DDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0x0, 0x1 4.5.2.1.4 DDR mode with FlexSPIn_MCR0[RXCLKSRC] = 0x3 There are two cases when the memory provides both read data and the read strobe in DDR mode: • B1—Memory generates both read data and read strobe on SCK edges • B2—Memory generates read data on SCK edges and generates read strobe on SCK2 edges Figure 23. FlexSPI input timing in DDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0x3 (case B1) Table 55. FlexSPI input timing in DDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0x1 Symbol Parameter Min Max Unit Frequency of operation — 66 MHz TIS Setup time for incoming data 2 — ns TIH Hold time for incoming data 1 — ns Table 56. FlexSPI input timing in DDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0x3 (case B1) Symbol Parameter Min Max Unit Frequency of operation — 166 MHz TSCKD - TSCKDQS Time delta between TSCKD and TSCKDQS -1 1 ns TIS TIH TIS TIH SCLK SIO[0:7] Internal Sample Clock TSCKD TSCKDQS SIO[0:7] DQS SCK |
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