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IMXRT1160CEC Datasheet(PDF) 74 Page - NXP Semiconductors |
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IMXRT1160CEC Datasheet(HTML) 74 Page - NXP Semiconductors |
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74 / 124 page  i.MX RT1160 Crossover Processors Data Sheet for Consumer Products, Rev. 0, 04/2021 74 NXP Semiconductors Electrical characteristics fADCK ADC conversion clock frequency 8 — 88 MHz — Csample Sample cycles 3.5 — 131.5 Cycles 3 Ccompare Fixed compare cycles — 17.5 — Cycles — Cconversion Conversion cycles Cconversion = Csample + Ccompare Cycles — TUE Total unadjusted Error — -14 to -2 — LSB 4 DNL Differential nonlinearity — ±1.2 — LSB 4,5 INL Integral nonlinearity — ±1.2 — LSB 4,5 ENOB Effective number of bits 6 Single-ended mode Avg = 1 — 10.3 — — Avg = 2 — 10.6 — — Avg = 16 — 11.3 — — Differential mode Avg = 1 — 11.2 — — Avg = 2 — — — — Avg = 16 — — — — SINAD Signal to noise plus distortion SINAD = 6.02 x ENOB + 1.76 dB — EFS Full-scale error — -4 — LSB 4 EZS Zero-scale error — 0.05 — LSB 4 lin_ext_leak External channel leakage current —30 500 nA — EIL Input leakage error RAS * lin_ext_leak mV — tADCSETUP Setup time — 5 — s — 1 Typical values assume Temp = 25 °C and fACLK = Max, unless otherwise stated. Typical values are for reference only, and are not tested in production. 2 This resistance is external to the SoC. To achieve the best results, the analog source resistance must be kept as low as possible. The results in this data sheet were derived from a system that had < 15 Ω analog source resistance. The RAS and CAS time constant should be kept to < 1 ns. 3 See Figure 33, "Sample time VS. RAS". 4 1 LSB = (VREFH - VREFL) / 2^N, N = 12 5 ADC conversion clock at max frequency and using linear histogram. 6 Input data used for test is 1 kHz sine wave. Table 74. ADC electrical specifications (VREFFH = 1.68 V and VADINmax ≤ NVCC_GPIOmax) (continued) Symbol Description Min Typ1 Max Unit Notes |
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