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DS20006554A Datasheet(PDF) 60 Page - Microchip Technology |
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DS20006554A Datasheet(HTML) 60 Page - Microchip Technology |
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60 / 94 page ![]() ZL30260-ZL30263 Data Sheet 60 © 2021 Microchip Technology Inc. DS20006554A Register Name: AID1 Register Description: APLL Increment/Decrement Register 1 Register Address: 119h Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name AID[7:0] Default 0 0 0 0 0 0 0 0 Bits 7 to 0: APLL Increment/Decrement (AID[7:0]). The full 32-bit AID[31:0] register spans this register through AID4. It is an unsigned integer. There are two uses for this field: frequency increment/decrement, and spread spectrum modulation. The two uses are mutually-exclusive, i.e. only one can be in use at a time. For frequency increment/decrement, AID[23:0] x 27 is added to the APLL’s feedback divider value each time the trigger specified by AIDCR.FISS changes state. AID[23:0] x 27 is subtracted from the APLL’s feedback divider value each time the trigger specified by AIDCR.FDSS changes state. AID[31:24] is ignored for frequency increment/decrement. ACR1.USEFDIV must be set to 0 for this behavior. See section 5.5.7. For spread spectrum modulation, the full 32-bit AID[31:0] value is subtracted (decremented) and added (incremented) to the zero PPM value every APLL input clock cycle for the number of clock cycles specified by the ASCNT registers. The zero PPM value is the nominal AFBDIV register value (when ACR1.USEFDIV=0) or the nominal fractional output divider value (when ACR1.USEFDIV=1). See section 5.5.8. Register Name: AID2 Register Description: APLL Increment/Decrement Register 2 Register Address: 11Ah Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name AID[15:8] Default 0 0 0 0 0 0 0 0 Bits 7 to 0: APLL Increment/Decrement (AID[15:8]). See the AID1 register description. Register Name: AID3 Register Description: APLL Increment/Decrement Register 3 Register Address: 11Bh Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name AID[23:16] Default 0 0 0 0 0 0 0 0 Bits 7 to 0: APLL Increment/Decrement (AID[23:16]). See the AID1 register description. Register Name: AID4 Register Description: APLL Increment/Decrement Register 4 Register Address: 11Ch Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Name AID[31:24] Default 0 0 0 0 0 0 0 0 Bits 7 to 0: APLL Increment/Decrement (AID[31:24]). See the AID1 register description. |
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