SST26VF080AT-80ESLASHMF datasheet(11/72 Pages) MICROCHIP

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DS20006203C-page 11

SST26VF080A

4.7

Configuration Register

The Configuration register is a Read/Write register that

stores a variety of configuration information. See

Table 4-5 for the function of each bit in the register.

4.7.1

I/O CONFIGURATION (IOC)

The I/O Configuration (IOC) bit reconfigures the I/O

pins. The IOC bit is set by writing a ‘1’ to Bit 1 of the

Configuration register. When IOC bit is ‘0’ the WP# pin

and HOLD# pin or RST# pin are enabled (SPI or Dual

configuration setup). When IOC bit is set to ‘1’ the SIO2

pin and SIO3 pin are enabled (SPI Quad I/O configura-

tion setup). The IOC bit must be set to ‘1’ before issuing

the following SPI commands: SQOR (6BH), SQIOR

(EBH), SPI Quad page program (32H) and RBSPI

(ECH). Without setting the IOC bit to ‘1’, those SPI

commands are not valid. The I/O Configuration bit does

not apply when in SQI mode. The default at power-up

and after hardware/software Reset is ‘0’.

4.7.2

VOLATILE LOCK PROTECTION

(VLP)

The Volatile Lock Protection (VLP) bit is a volatile bit

which is set to ‘1’ when a lock-down protection settings

(LDPS) command is executed. When VLP bit is set

to ‘1’, it locks the protection bit BP0, BP1, BP2, BP3

settings of the STATUS register. The VLP bit can be

cleared to ‘0’ only by performing a hardware Reset or

by performing a power cycle.

4.7.3

SECURITY ID STATUS (SEC)

The Security ID Status (SEC) bit indicates when the

Security ID space is locked to prevent a write com-

mand. The SEC bit is ‘1’ after the host issues a Lockout

SID command. Once the host issues a Lockout SID

command, the SEC bit can never be reset to ‘0’.

TABLE 4-5:

CONFIGURATION REGISTER

Bit

Name

Function

Default at

Power-Up

Read/Write

(R/W)

Reserved

IOC

I/O Configuration

1 = WP# and RST# or HOLD# pins disabled

0 = WP# and RST# or HOLD# pins enabled

0(1)

R/W

VLP

Volatile Lock Protection

1 = Locks Protection bit setting of BP0, BP1, BP2, BP3

of STATUS register

0 = Protection bit BP0, BP1, BP2, BP3 setting not

locked by VLP bit

0(1)

SEC

Security ID Status

1 = Security ID space locked

0 = Security ID space not locked

0(2)

WSE

Write Suspend Erase Status

1 = Erase suspended

0 = Erase is not suspended

WSP

Write Suspend Program Status

1 = Program suspended

0 = Program is not suspended

RSTHLD

RST# pin or HOLD# Pin Enable

1 = RST# pin enabled

0 = HOLD# pin enabled

0(3)

R/W

WPEN

Write Protection Pin (WP#) Enable

1 = WP# enabled

0 = WP# disabled

0(3)

R/W

Note 1: Default at power-up or after hardware Reset is ‘0’.

2: The Security ID status will always be ‘1’ at power-up after a successful execution of the Lockout Security

ID instruction, otherwise default at power-up is ‘0’.

3: Factory default setting. This is a nonvolatile bit, default at power-up will be the setting prior to

power-down.

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