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Z8F082ASH020SC Datasheet(PDF) 106 Page - Zilog, Inc.

Part # Z8F082ASH020SC
Description  Z8 Encore XP-R F08xA Series with eXtended Peripherals
PDF  244 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z8F082ASH020SC Datasheet(HTML) 106 Page - Zilog, Inc.

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PS024705-0405
P R E L I M I N A R Y
UART
Z8 Encore! XP® F08xA Seriess
Product Specification
88
The UART is now configured for interrupt-driven data transmission. Because the UART
Transmit Data register is empty, an interrupt is generated immediately. When the UART
Transmit interrupt is detected, the associated interrupt service routine (ISR) performs the
following:
1. Write the UART Control 1 register to select the multiprocessor bit for the byte to be
transmitted:
Set the Multiprocessor Bit Transmitter (MPBT) if sending an address byte, clear it if
sending a data byte.
2. Write the data byte to the UART Transmit Data register. The transmitter automatically
transfers the data to the Transmit Shift register and transmits the data.
3. Clear the UART Transmit interrupt bit in the applicable Interrupt Request register.
4. Execute the IRET instruction to return from the interrupt-service routine and wait for
the Transmit Data register to again become empty.
Receiving Data using the Polled Method
Follow these steps to configure the UART for polled data reception:
5. Write to the UART Baud Rate High and Low Byte registers to set an acceptable baud
rate for the incoming data stream.
6. Enable the UART pin functions by configuring the associated GPIO Port pins for
alternate function operation.
7. Write to the UART Control 1 register to enable MULTIPROCESSOR mode functions,
if appropriate.
8. Write to the UART Control 0 register to:
–
Set the receive enable bit (REN) to enable the UART for data reception
–
Enable parity, if appropriate and if Multiprocessor mode is not enabled, and select
either even or odd parity.
9. Check the RDA bit in the UART Status 0 register to determine if the Receive Data
register contains a valid data byte (indicated by a 1). If RDA is set to 1 to indicate
available data, continue to Step 5. If the Receive Data register is empty (indicated by a
0), continue to monitor the RDA bit awaiting reception of the valid data.
10. Read data from the UART Receive Data register. If operating in MULTIPROCESSOR
(9-bit) mode, further actions may be required depending on the MULTIPROCESSOR
mode bits MPMD[1:0].
11. Return to Step 4 to receive additional data.



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