SH7041A datasheet(554/923 Pages) RENESAS

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In transmitting serial data, the SCI operates as follows:

1.The SCI monitors the TDRE bit in the SSR.When TDRE is cleared to 0 the SCI recognizes

that the transmit data register (TDR) contains new data, and loads this data from the TDR into

the transmit shift register (TSR).

2.After loading the data from the TDR into the TSR, the SCI sets the TDRE bit to 1 and starts

transmitting. If the transmit-data-empty interrupt enable bit (TIE) in the SCR is set to 1, the

SCI requests a transmit-data-empty interrupt (TxI) at this time.

Serial transmit data is transmitted in the following order from the TxD pin:

a.Start bit: one 0 bit is output.

b.Transmit data: seven or eight bits are output, LSB first.

c.Multiprocessor bit: one multiprocessor bit (MPBT value) is output.

d.Stop bit: one or two 1 bits (stop bits) are output.

e.Marking: output of 1 bits continues until the start bit of the next transmit data.

3.The SCI checks the TDRE bit when it outputs the stop bit.If TDRE is 0, the SCI loads data

from the TDR into the TSR, outputs the stop bit, then begins serial transmission of the next

frame. If TDRE is 1, the SCI sets the TEND bit in the SSR to 1, outputs the stop bit, then

continues output of 1 bits in the marking state. If the transmit-end interrupt enable bit (TEIE)

in the SCR is set to 1, a transmit-end interrupt (TEI) is requested at this time.

Figure 14.12 shows an example of SCI receive operation in the multiprocessor format.

SH7041A Datasheet(PDF) 554 Page - Renesas Technology Corp