SH7041A datasheet(730/923 Pages) RENESAS

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• Bit 1—Erase 1 (E1): Selects erase mode transition or release (applicable addresses: H'00000–

H'1FFFF). Do not set the SWE, ESU1, PSU1, EV1, PV1, or P1 bit at the same time.

Bit 1: E1

Description

Erase mode release (Initial value)

Transition to erase mode

[Setting condition] When FWE=1, SWE=1, and ESU1=1

• Bit 0—Program 1 (P1): Selects program mode transition or release (applicable addresses:

H'00000–H'1FFFF). Do not set the SWE, PSU1, ESU1, EV1, PV1, or E1 bit at the same time.

Bit 0: P1

Description

Program setup mode release (Initial value)

Program setup

[Setting condition] When FWE=1, SWE=1, and PSU1=1

22.5.2

Flash Memory Control Register 2 (FLMCR2)

FLMCR2 is an 8-bit register used for flash memory operating mode control. Program-verify mode

or erase-verify mode for addresses H'20000–H'3FFFF is entered by setting SWE (FLMCR1) to 1

when FWE (FLMCR1) = 1, then setting the EV2 or PV2 bit. Program mode for addresses

H'20000–H'3FFFF is entered by setting SWE (FLMCR1) to 1 when FWE (FLMCR1) = 1, then

setting the PSU2 bit, and finally setting the P2 bit. Erase mode for addresses H'20000–H'3FFFF is

entered by setting SWE (FLMCR1) to 1 when FWE (FLMCR1) = 1, then setting the ESU2 bit,

and finally setting the E2 bit. FLMCR2 is initialized to H'00 by a power-on reset, in standby

mode, when a high level is input to the FWP pin, and when a low level is input to the FWP pin

and the SWE bit in FLMCR1 is not set (the exception is the FLER bit, which is initialized only by

a power-on reset). When on-chip flash memory is disabled, a read will return H'00, and writes are

invalid.

Writes to bits ESU2, PSU2, EV2, and PV2 in FLMCR2 are enabled only when FWE (FLMCR1) =

1 and SWE (FLMCR1) = 1; writes to the E2 bit only when FWE (FLMCR1) = 1, SWE

(FLMCR1) = 1, and ESU2 = 1; and writes to the P2 bit only when FWE (FLMCR1) = 1, SWE

(FLMCR1) = 1, and PSU2 = 1.

SH7041A Datasheet(PDF) 730 Page - Renesas Technology Corp