SH7041A datasheet(323/923 Pages) RENESAS

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Bit 4:

CKEG1

Bit 3:

CKEG0 Description

Count on rising edges (initial value)

Count on falling edges

Count on both rising and falling edges

Notes: 1. X: 0 or 1, don’t care.

2. Internal clock edge selection is effective when the input clock is

φ/4 or slower. When ø/1

or the overflow/underflow of another channel is selected for the input clock, although

values can be written, counter operation complies with the initial value (count on rising

edges).

• Bits 2–0—Timer Prescaler 2–0 (TPSC2–TPSC0): TPSC2–TPSC0 select the counter clock

source for the TCNT. An independent clock source can be selected for each channel. Table

12.4 shows the possible settings for each channel.

Table 12.4

MTU Clock Sources

Internal Clock

Other Channel

External Clock

Chan-

nel

φ/1 φ/4

φ/

256

φ/

1024

Overflow/

Underflow

TCL

OOOX

OOOO

Note:

Symbols: O: Setting possible

X: Setting not possible

Channel 0:

Bit 2:

TPSC2

Bit 1:

TPSC1

Bit 0:

TPSC0

Description

Internal clock: count with

φ/1 (initial value)

Internal clock: count with

φ/4

Internal clock: count with

φ/16

Internal clock: count with

φ/64

External clock: count with the TCLKA pin input

External clock: count with the TCLKB pin input

External clock: count with the TCLKC pin input

External clock: count with the TCLKD pin input

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