ISO6720_V02 datasheet(7/49 Pages) TI

7 / 49 page

6.6 Insulation Specifications

PARAMETER

TEST CONDITIONS

VALUE

UNIT

8-D

IEC 60664-1

CLR

External clearance(1)

Side 1 to side 2 distance through air

CPG

External creepage(1)

Side 1 to side 2 distance across package

surface

DTI

Distance through the insulation

Minimum internal gap (internal clearance)

>17

µm

CTI

Comparative tracking index

IEC 60112; UL 746A

>400

Material Group

According to IEC 60664-1

Overvoltage category

Rated mains voltage ≤ 150 VRMS

I-IV

Rated mains voltage ≤ 300 VRMS

I-III

DIN VDE V 0884-11:2017-01(2)

VIORM

Maximum repetitive peak isolation voltage

AC voltage (bipolar)

637

VPK

VIOWM

Maximum isolation working voltage

AC voltage (sine wave); time-dependent

dielectric breakdown (TDDB) test. See Figure

9-8

450

VRMS

DC voltage

637

VDC

VIOTM

Maximum transient isolation voltage

VTEST = VIOTM , t = 60 s (qualification); VTEST

= 1.2 × VIOTM, t = 1 s (100% production)

4242

VPK

VIOSM

Maximum surge isolation voltage(3)

Test method per IEC 62368-1, 1.2/50 µs

waveform, VTEST = 1.3 × VIOSM = 6500 VPK

(qualification)

5000

VPK

qpd

Apparent charge(4)

Method a: After I/O safety test subgroup 2/3,

Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM ,

tm = 10 s

≤ 5

Method a: After environmental tests subgroup

1, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 ×

VIORM , tm = 10 s

≤ 5

Method b: At routine test (100% production)

and preconditioning (type test), Vini = VIOTM,

tini = 1 s; Vpd(m) = 1.5 × VIORM , tm = 1 s

≤ 5

CIO

Barrier capacitance, input to output(5)

VIO = 0.4 × sin (2 πft), f = 1 MHz

~0.5

RIO

Insulation resistance, input to output(5)

VIO = 500 V, TA = 25°C

> 1012

VIO = 500 V, 100°C ≤ TA ≤ 125°C

> 1011

VIO = 500 V at TS = 150°C

> 109

Pollution degree

Climatic category

40/125/21

UL 1577

VISO

Withstand isolation voltage

VTEST = VISO , t = 60 s (qualification); VTEST =

1.2 × VISO , t = 1 s (100% production)

3000

VRMS

(1)

Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application.

Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the

isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal

in certain cases. Techniques such as inserting grooves, ribs, or both on a printed circuit board are used to help increase these

specifications.

(2)

ISO672x is suitable for basic electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by

means of suitable protective circuits.

(3)

Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.

(4)

Apparent charge is electrical discharge caused by a partial discharge (pd).

(5)

All pins on each side of the barrier tied together creating a two-pin device.

www.ti.com

ISO6720, ISO6721, ISO6721R

SLLSFJ0D – JANUARY 2020 – REVISED SEPTEMBER 2021

Submit Document Feedback

Product Folder Links: ISO6720 ISO6721 ISO6721R

ISO6720 Datasheet(PDF) 7 Page - Texas Instruments

ISO6720 Datasheet(HTML) 7 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49

Datasheet Download

Link URL