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STM32H750VB Datasheet(PDF) 184 Page - STMicroelectronics

Part # STM32H750VB
Description  32-bit Arm® Cortex®-M7 480MHz MCUs, 128 Kbyte Flash, 1 Mbyte RAM, 46 com. and analog interfaces, crypto
PDF  335 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H750VB Datasheet(HTML) 184 Page - STMicroelectronics

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Electrical characteristics (rev Y)
STM32H750VB STM32H750ZB STM32H750IB STM32H750XB
184/334
DS12556 Rev 5
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 104 for the SPI interface are
derived from tests performed under the ambient temperature, fPCLKx frequency and VDD
supply voltage conditions summarized in Table 22: General operating conditions, with the
following configuration:
Output speed is set to OSPEEDRy[1:0] = 11
Capacitive load C = 30 pF
Measurement points are done at CMOS levels: 0.5VDD
I/O compensation cell enabled
HSLV activated when VDD ≤ 2.7 V
Refer to Section 6.3.15: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO for SPI).
Table 104. SPI dynamic characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
1.62 V≤VDD≤3.6 V
--
90
MHz
Master mode
2.7 V≤VDD≤3.6 V
SPI1,2,3
133
Master mode
2.7 V≤VDD≤3.6 V
SPI4,5,6
100
Slave receiver mode
1.62 V≤VDD≤3.6 V
SPI1,2,3
150
Slave receiver mode
1.62 V≤VDD≤3.6 V
SPI4,5,6
100
Slave mode transmitter/full
duplex
2.7 V≤VDD≤3.6 V
31
Slave mode transmitter/full
duplex
1.62 V≤VDD≤3.6 V
25
tsu(NSS)
NSS setup time
Slave mode
2-
-
ns
th(NSS)
NSS hold time
1
-
-
tw(SCKH),
tw(SCKL)
SCK high and low time
Master mode
TPLCK - 2
TPLCK
TPLCK + 2



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