| Electronic Components Datasheet Search |
|
STM32H750VB Datasheet(PDF) 185 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32H750VB Datasheet(HTML) 185 Page - STMicroelectronics |
|
185 / 335 page ![]() DS12556 Rev 5 185/334 STM32H750VB STM32H750ZB STM32H750IB STM32H750XB Electrical characteristics (rev Y) 311 Figure 45. SPI timing diagram - slave mode and CPHA = 0 tsu(MI) Data input setup time Master mode 1 - - ns tsu(SI) Slave mode 2 - - th(MI) Data input hold time Master mode 2 - - th(SI) Slave mode 1 - - ta(SO) Data output access time Slave mode 9 13 27 tdis(SO) Data output disable time Slave mode 0 1 5 tv(SO) Data output valid time Slave mode, 2.7 V≤VDD≤3.6 V - 11.5 16 Slave mode 1.62 V≤VDD≤3.6 V - 13 20 tv(MO) Master mode - 1 3 th(SO) Data output hold time Slave mode, 1.62 V≤VDD≤3.6 V 9 - - th(MO) Master mode 0 - - 1. Guaranteed by characterization results. Table 104. SPI dynamic characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit MSv41658V1 NSS input CPHA=0 CPOL=0 CPHA=0 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tc(SCK) tr(SCK) th(NSS) tdis(SO) tsu(NSS) ta(SO) tv(SO) Next bits IN Last bit OUT First bit IN First bit OUT Next bits OUT th(SO) tf(SCK) Last bit IN |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |