STM32H750VB datasheet(296/335 Pages) STMICROELECTRONICS

296 / 335 page

Electrical characteristics (rev V)

STM32H750VB STM32H750ZB STM32H750IB STM32H750XB

296/334

DS12556 Rev 5

SPI interface characteristics

Unless otherwise specified, the parameters given in Table 203 for SPI are derived from tests

performed under the ambient temperature, fPCLKx frequency and VDD supply voltage

conditions summarized in Table 120: General operating conditions, with the following

configuration:



Output speed is set to OSPEEDRy[1:0] = 11



Capacitive load CL = 30 pF



Measurement points are done at CMOS levels: 0.5VDD



IO Compensation cell activated.



HSLV activated when VDD ≤ 2.7 V



VOS level set to VOS1

Refer to Section 7.3.15: I/O port characteristics for more details on the input/output alternate

function characteristics (NSS, SCK, MOSI, MISO for SPI).

Table 203. SPI characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fSCK

SPI clock frequency

Master mode

1.62<VDD<3.6 V

SPI1, 2, 3

MHz

Master mode

2.7<VDD<3.6 V

SPI1, 2, 3

100

Master mode

1.62<VDD<3.6 V

SPI4, 5, 6

Slave receiver mode

1.62<VDD<3.6 V

100

Slave mode transmitter/full duplex

2.7<VDD<3.6 V

Slave mode transmitter/full duplex

1.62 <VDD<3.6 V

tsu(NSS)

NSS setup time

Slave mode

th(NSS)

NSS hold time

Slave mode

tw(SCKH),

tw(SCKL)

SCK high and low time

Master mode

TPCLK-2 TPCLK TPCLK+2

STM32H750VB Datasheet(PDF) 296 Page - STMicroelectronics

STM32H750VB Datasheet(HTML) 296 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL