COMMON a common mode voltage will be introduced

and, although the ICL7135 has an excellent CMRR, Input

Low and Analog COMMON should be connected together

whenever possible. Analog COMMON is also the reference

point for the reference voltage. TheAnalog Common voltage is

normally connected to the system ground when using ±5V

supplies. When the ICL7135 is operated from a single

supply voltage the Analog Common should be connected

to a voltage source approximately halfway between V+

and ground.

Input Buffer

The ICL7135 input buffer is a CMOS buffer with a common

mode input voltage range of approximately V+ -1.0V to

V- +1.5V. The quiescent current is approximately 100µA

and the buffer can deliver up to 40µ of output current with

excellent linearity.

Integrator

The integrator amplifier, similar to the buffer amplifier, can

deliver 20µA of output current with high linearity while

swinging to within 0.3V of either supply rail. The integrator’s

non-inverting terminal is connected to IN LO during the

signal integrate phase, so the voltage on the IN LO

terminal sets the starting point for the integrator output

during signal integrate. If IN LO is at a voltage other than

ground, this will limit the maximum allowable swing at the

integrator output, and the value of the integrating capaci-

tor should be increased. (Refer to Component Selection)

Comparator

The comparator monitors the voltage on the integrator

capacitor during deintegrate. The digital section samples

the comparator output once per clock cycle and terminates

the deintegrate cycle when the comparator changes its

state as the integrator voltage passes through zero. The

offset voltage of the comparator is not critical since the

auto-zero phase compensates for the offset. The output of

the comparator is the only output from the analog section

to the digital section.

Digital Section

As shown in Figure 3, the digital section consists of coun-

ters, latches, output multiplexer, and control logic. The

control logic monitors the counters and the comparator

to determine the start of each phase, and sends control

signals to the analog section to drive the analog switches

to the proper state for each measurement phase. The

control section also responds to the external input, RUN/

HOLD, and creates the control outputs; OVERRANGE,

UNDERRANGE, BUSY, and STROBE.

RUN/HOLD

When RUN/HOLD is high or open the ICL7135 will

continuously perform conversions with each measure-

ment being 40,002 clock cycles long. When RUN/HOLD

goes low, the ICL7135 will complete the measurement in

progress then remain in the auto-zero cycle, holding the

last reading. If RUN/HOLD goes high after the maximum

period assigned to deintegrate, a new conversion will

start, with a delay of 1 to 10,001 clock cycles between

Figure 2. Analog Section of ICL7135

ICL7135

Multiplexed BCD Outputs

www.maximintegrated.com

Maxim Integrated │ 5

10

IN HI

ANALOG

COMMON

IN LO

3

9

1

AZ

A/Z

A/Z + DE(±) + ZI

INT

A/Z

BUFFER

REF HI

8

2

7

6

5

4

11

V+

INT

AUTO

ZERO

INTEGRATOR

DE(+)

ZI

INPUT

HIGH

INPUT

LOW

COMPARATOR

A/Z

DE(-)

DE(-)

V-

DE(+)

INT

ICL7135