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TMS28F004ASB70CDCDL Datasheet(PDF) 37 Page - Texas Instruments |
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TMS28F004ASB70CDCDL Datasheet(HTML) 37 Page - Texas Instruments |
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37 / 80 page  TMS28F004Axy, TMS28F400Axy 524288 BY 8-BIT/262144 BY 16-BIT AUTO-SELECT BOOT-BLOCK FLASH MEMORIES SMJS829A – JANUARY 1996 – REVISED AUGUST 1997 37 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 power-up and reset switching characteristics for TMS28F004AEy and TMS28F400AEy over recommended ranges of supply voltage (commercial and extended temperature ranges) (see Notes 11, 12, and 13) ALT ’28F004AEy 60 ’28F400AEy 60 PARAMETER ALT. SYMBOL 3-V VCC RANGE 5-V VCC RANGE UNIT MIN MAX MIN MAX tsu(VCC) Setup time, RP low to VCC at 4.5 V MIN (to VCC at 2.7 V MIN or 3.6 V MAX) (see Note 14) tPL5V tPL3V 0 0 ns ta(DV) Address valid to data valid tAVQV 110 60 ns tsu(DV) Setup time, RP high to data valid tPHQV 800 450 ns th(RP5) Hold time, VCC at 4.5 V (MIN) to RP high t5VPH 2 2 µs th(RP3) Hold time, VCC at 2.7 V (MIN) to RP high t3VPH 2 2 µs ALT ’28F004AEy 70 ’28F400AEy 70 ’28F004AEy 80 ’28F400AEy 80 PARAMETER ALT. SYMBOL 3-V VCC RANGE 5-V VCC RANGE 3-V VCC RANGE 5-V VCC RANGE UNIT MIN MAX MIN MAX MIN MAX MIN MAX tsu(VCC) Setup time, RP low to VCC at 4.5 V MIN (to VCC at 2.7 V MIN or 3.6 V MAX) (see Note 14) tPL5V tPL3V 0 0 0 0 ns ta(DV) Address valid to data valid tAVQV 150 70 150 80 ns tsu(DV) Setup time, RP high to data valid tPHQV 800 450 800 450 ns th(RP5) Hold time, VCC at 4.5 V (MIN) to RP high t5VPH 2 2 2 2 µs th(RP3) Hold time, VCC at 2.7 V (MIN) to RP high t3VPH 2 2 2 2 µs NOTES: 11. Characterization data available 12. All ac current values are RMS unless otherwise noted. 13. E and G are switched low after power up. 14. The power supply can switch low concurrently with RP going low. |
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